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Cadence rolls custom-IC tools into one platform

Posted: 17 Sep 2003 ?? ?Print Version ?Bookmark and Share

Keywords:cadence design systems? virtuoso? virtuoso composer? virtuoso chip editor? virtuoso-xl layout editor?

Cadence Design Systems Inc. has linked several acquired technologies with upgraded legacy tools to create an integrated custom IC design platform. Cadence now offers a platform for digital, analog, mixed-signal and RF designs, strengthening a tool segment it already dominates, said Paul Estrada, VP of the verification group.

Cadence's market share exceeds 80 percent in this area, according to market research firm Gartner Dataquest Inc.

"We're expanding the Virtuoso [product] name to cover the whole platform for full custom, including simulation, capture, integration and silicon analysis," said Estrada.

Before introducing the Virtuoso platform, Cadence offered the Virtuoso Composer composition environment, Virtuoso Chip Editor layout editor and Virtuoso-XL Layout Editor design environment. "The focus of the platform is delivering silicon that meets all of its specifications and doing so on schedule," Estrada said.

To that end, Cadence has integrated three improved design capabilities into the platform: simulation, analysis and floor planning. The platform includes tools that Cadence gained in its acquisitions of Antrim Design Systems Inc. and Celestry Design Technologies Inc. All tools in the platform are linked via the OpenAccess database or Cadence's legacy CDBA.

The Antrim acquisition, in November 2002, gave Cadence users the ability to create a customized, specification-driven environment for Virtuoso simulation, analysis and floorplanning. "With this technology, we can capture the step you take with regard to the testing you're doing and the types of analysis on your IP, so you can repeat those processes and best practices to the rest of your team," said Estrada.

The Celestry acquisition, in January, gave Cadence an advanced device-modeling tool as well as FastSpice simulation. In a roundabout way, the Celestry technology lets the entire line of Cadence simulators work from the same device models. Cadence, thus, can offer customers FastSpice, Spice, analog/mixed-signal and RF simulation both as standalone simulators and under a multimode simulation license.

Each multimode "master license" costs $140,000, which gets customers six "tokens." Spice counts as one token, RF counts as two tokens, analog/mixed-signal as three and FastSpice as six. In the course of one day, for example, customers might use three Spice tokens and one analog/mixed-signal token, then exchange those later in the day for a FastSpice license, Estrada said. All the simulators now use common syntax, models and equations, he said.

Cadence also improved the Spice simulator engine to get 3x faster Spice performance, and it added full compatibility with HSpice from Synopsys Inc.

The company adjusted the Virtuoso Layout Editor's algorithms to yield a tenfold performance boost. For the Virtuoso Layout Editor Turbo upgrade, Cadence added design-rule-driven, QuickCell-parameterized cell specification as well as wire-to-wire editing. Other enhancements include OpenAccess support, for a threefold capacity improvement, and rectilinear floor planning within Virtuoso XL, an upgrade of the editor with capability above Virtuoso LE Turbo.

The Virtuoso platform also includes Virtuoso Chip Editor, the layout tool announced earlier this year for custom, cell-based and mixed implementations.

For analog/mixed-signal design at 0.18?m, Estrada said, high-accuracy parasitic extraction, analog IR-drop analysis and power-grid electromigration analysis become critical for circuit design and full-chip electrical verification. And at 0.13?m, they become a must. Cadence thus has placed all of those capabilities, along with design rule checking and layout-vs.-schematic checking, into the new AMS Silicon Analysis portion of Virtuoso.

Virtuoso HF-AMS Silicon Analysis adds inductance extraction, electromigration and a field solver for high-frequency analog and mixed-signal designs with clock speeds greater than 1GHz.

Noting that the custom design technologies in Virtuoso are linked via OpenAccess, Estrada said the platform has a bidirectional data exchange capability with Encounter, Cadence's digital IC platform. Cadence's older database has a one-way flow from Virtuoso to Encounter.

To accompany the release of the Virtuoso platform, Cadence has published the Virtuoso Advanced Custom Design methodology, described in a whitepaper at EEdesign. The methodology is based on industry best practices and an approach that combines the speed of top-down design with the silicon accuracy of bottom-up design. Cadence said it plans to evolve the methodology to guide development of the Virtuoso platform.

The company also offers training on the Virtuoso analog/mixed-signal baseline flow. This detailed, step-by-step flow is based on a distributable reference design and PDK and is available via demonstrations, hands-on workshops, documentation, training and methodology services. Cadence will deliver additional baseline flows over the next year.

The entire Virtuoso platform now runs on Linux as well as Unix.

U.S. pricing for a one-year license starts at $140,000 for Virtuoso Multi-mode Simulation, $15,000 for Virtuoso XL and $100,000 for Virtuoso Silicon Analysis.

- Michael Santarini

EE Times

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