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MIPS unveils new line of synthesizable cores

Posted: 17 Oct 2003 ?? ?Print Version ?Bookmark and Share

Keywords:mips technologies? synthesizable core? mips32? 24k? soc-it?

MIPS Technologies Inc. has unveiled four members of its 32-bit synthesizable core family that are derivatives of the MIPS32 24K microarchitecture. The company has also introduced a new version of its SoC-it system controller called SoC-it OCP.

The SoC-it system architecture solution provides an integrated high performance memory controller (SDR and DDR) and bridging solutions to other bus standards. By coupling the SoC-it OCP with 24K cores, the company reduces time-to-market to customers by pre-engineering the highest performance common system components.

The 24K core family offers broad tool and software support available to products based upon an industry-standard architecture. All four 24K cores include Release 2 features of the MIPS32 architecture that support multiprocessing, enhanced bit-field manipulation, reduced interrupt latency, and enhanced cache control.





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