Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > EDA/IP

Panelists, keynoter cite EDA interoperability roadblocks

Posted: 21 Oct 2003 ?? ?Print Version ?Bookmark and Share

Keywords:Synopsys? EDA Interoperability Developer's Forum? EDA? SystemVerilog? synthesis?

Panelists explored EDA interoperability "hot buttons" at the Synopsys EDA Interoperability Developer's Forum held last October 16-17, while a keynote speech looked at "the good, bad, and ugly" of interoperability. Meanwhile, presenters offered updates on a number of EDA standards efforts, including a new initiative to standardize process design kits (PDKs).

The forum is an ongoing event held by Synopsys for third-party EDA providers. Most speakers and presenters were from other EDA vendors or user companies, and a user panelist - Shahir Rajabzadeh, engineering manager at Cisco Systems - aired his complaints about interoperability and about a lack of EDA tool innovation.

The forum included updates on SystemVerilog 3.1, the Liberty library format, the Accellera standards organization and the Golden Gate working group that's seeking to link the OpenAccess and Milkyway databases. Synopsys provided some information about the SystemVerilog synthesis subset it intends to use with its Design Compiler product.

One presentation discussed Accellera's OpenKit (OK) initiative, not yet publicly announced but first revealed this June. Seeking interoperability at the transistor level, the initiative intends to develop standardized nomenclature, formats and symbol conventions for the PDKs that foundries issue for every process.

"Earlier this year we started talking about how we can improve custom design," said consultant Nick English, director of the OpenKit initiative. "We realized we'd make no progress with custom design until we clean up the mess underneath."

The initiative, English said, will seek to develop standards for design function, nomenclature and categories; design kit elements and formats; tool and technology fit; and design type and applications. It will also seek standards for ownership, qualification, revision control and distribution.

During the panel discussion, panelists were asked to share their "hot buttons" for interoperability. Cisco's Rajabzadeh lead the way. "With best of breed tools, we find they don't speak the same language," he said. "So end users like us have to spend a tremendous amount of time hacking files to get these things to speak the same language."

Rajabzadeh also noted, however, that EDA tool innovation is a higher priority than integration. "We don't see a lot of innovations addressing the high end of design," he said. "I haven't heard anything during the past two years about big innovations coming up."

Dennis Brophy, Accellera chairman, said "adherence to standards" was his hot button. "If it's something that can expand the market, you have to use the whole thing and apply it," he said.

Sanjay Srivastava, Denali president and CEO, cited the numerous integrations his engineering team had to handle for Denali's memory models and controllers - which had to run with verification and debugging tools from many different vendors. "I don't think the next new technology should have to do 20, 30, 40 integrations. We need to solve the problem," he said.

Data size and complexity was an issue for Dinesh Bettadapur, president and CEO of MaskTools, an ASML company. "Customers tell me they're going to have 50 Gbyte files with all of the OPC [optical proximity correction] and mask things sitting on it," he said. To get standards in place, he noted, more customer commitment is needed.

Bettadapur also had a warning for Synopsys and Cadence Design Systems. "When I heard about OpenAccess and Milkyway, I realized the two largest companies were trying to compete with data models and APIs," he said. "If we're not careful, we'll end up with two big camps and a greater chasm in between."

That kind of divisiveness is what Jim Hogan, senior vice president for business development at Artisan Components, took aim at in his keynote speech. Looking at both sides of interoperability, he took aim at standards that were ahead of their time, solutions looking for problems, proprietary semantics, language wars and "skirmish issues" such as the dispute between the Accellera and the IEEE 1364 committee over how to develop the next generation of Verilog.

"These things are troublesome," Hogan said. "EDA vendors focus on market share. They should focus on market expansion."

Acknowledging that his comments would be controversial, Hogan singled out several standards efforts that he viewed as failures, including VHDL, ALF and the Open Library API (OLA). With OLA, he said, "it wasn't an issue of whether technology was superior. The fact is people had a huge investment and it only gave them a minor utility. People don't change for a minor utility."

But Hogan praised the OpenKit initiative. "I would like to see, in my lifetime, analog design become as straightforward as digital design," he said. "The first step is to understand what the fab does and put that in the design environment. That's OK."

- Richard Goering

EE Times

Article Comments - Panelists, keynoter cite EDA interop...
*? You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.

Back to Top