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Transmeta microprocessor features HyperTransport interface

Posted: 22 Oct 2003 ?? ?Print Version ?Bookmark and Share

Keywords:efficeon? tm8000? microprocessor? transmeta? very long instruction word processor?

Aimed at portable and mainstream notebook computers, tablet PCs, ultra-personal computers, silent desktop computers, blade servers and embedded systems, the family of Efficeon TM8000 microprocessor from Transmeta Corp. is based on a silicon microarchitecture and the company's redesigned version of its Code Morphing Software.

The microarchitecture is based on a 256-bit VLIW (Very Long Instruction Word) processor that can issue up to 8 internal instructions per clock cycle. When combined with the Code Morphing Software, it provides full compatibility with modern x86 software, including MMX, SSE and SSE2 multimedia instructions.

The Efficeon family includes a high speed AGP-4X graphics interface that enables the use of industry standard high performance AGP graphics solutions. It also features a high speed DDR-400 (Double Data Rate SDRAM at 400Mbps) memory interface, with ECC (Error Correcting Code) as an option.

With a high performance HyperTransport interface that can send data at up to 1.6GBps aggregate, the product also includes a high speed Low Pin Count bus interface for communicating with the latest generation of flash memory.

The device reduces chip count and decreases the size and cost of the PCB to enable smaller form factor designs. The standard model Efficeon TM8600 processor will be offered in a 29-by-29mm package.





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