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Fujitsu evaluation device implements SoC platform

Posted: 07 Nov 2003 ?? ?Print Version ?Bookmark and Share

Keywords:fujitsu microelectronics asia? arm9? multi-CPU? evaluation device? arm926ej-s?

Fujitsu Microelectronics Asia Pte Ltd has announced the development of an ARM9 multi-CPU evaluation device, which implements the next-generation SoC platform, integrating ARM926EJ-S and ARM946E-S embedded macrocell cores.

Designed to improve efficiency, shorten customer's development times and enable more complete final chip solutions, the MB87Q1100 features a multi-layer Advanced High-performance Bus (AHB), 0.11?m CMOS process, and built-in peripherals such as Flash and SDRAM memory controller, eight-channel Direct Memory Access controller, interrupt controller, 2-channel UART, and 2 x 2 channel timer. Power consumption is 450mW.

The implementation of next-generation SoC platform, which adopts multi-CPU capabilities and the multi-layer AHB, improves throughput conventionally and reduces power consumption significantly. The external extension function of AHB-Lite, a sub-set of the AHB system bus, is incorporated. This makes it possible for customers to design and verify modules in their ASIC by connecting the master and slave module of AHB-Lite to the device.

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