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ADI receiver integrates 14-bit ADC, 6-channel DDC

Posted: 10 Nov 2003 ?? ?Print Version ?Bookmark and Share

Keywords:analog devices? wideband receiver subsystem? ad6654?

Analog Devices Inc. has introduced a wideband receiver subsystem for cellular base stations that addresses the performance requirements of 3G standards, such as CDMA2000, UMTS, and TD-SCDMA.

Enabling efficient processing of multi-carrier standards, the AD6654 removes the traditional interconnect issues associated with high-speed data transfer from the ADC to the digital down-converter (DDC). The integrated device also reduces the BoM components count.

The AD6654 features a fractional clock multiplier that uses the ADC clock to produce a DDC master clock up to 200MHz. This internal PLL allows high digital clock rates, regardless of the converter sampling rate. Two 16-bit parallel output ports accommodate high data rate 3G applications. Each parallel output port has a digital AGC for output data scaling.

Available in a 256-lead BGA package, the device is priced at $75.24 for the six-channel version and at $68.66 for the four-channel version, both for 10,000-piece quantities.

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