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Zarlink TDM family eases board-level design

Posted: 11 Nov 2003 ?? ?Print Version ?Bookmark and Share

Keywords:zarlink semiconductor? tdm switching device? zl50061? zl50050? zl50057?

Zarlink Semiconductor has launched a family of mid-density TDM switching devices that simplifies board-level design and reduces the cost of medium-capacity carrier equipment. The ZL50061 family consists of three 16,384-channel devices, one 12,288-channel chip, and an 8,192-channel switch.

Achieving a jitter tolerance of 17ns at data rates up to and including 16Mbps and 14ns for 32Mbps traffic, the ZL50061 family can be timed directly from the backplane's clock and frame pulses to eliminate the need for intermediary chips such as CPLDs (complex programmable logic devices) and FPGAs.

Offering a wide range of non-blocking, mid-density TDM/TSI switching ICs, three devices within the ZL50061 family provide pin-to-pin compatibility with the company's MT90869/70/71 family.

Measuring 15-by-15mm, the 8K ZL50050 is offered in a 196-ball PBGA and is priced at $52.46. The 12K ZL50057 measures 27-by-27mm in a 272-ball PBGA and is available for $64.64. The 12K ZL50058 is offered in a 256-ball PBGA that measures 17-by-17mm and is priced at $64.64. The ZL50060 16K and ZL50062 16K measures 17-by-17mm in a 256-ball PBGA and is available for $89.78 and $70.25, respectively. The 16K ZL50064 measures 28-by-28mm, comes in a 256-pin LQFP, and is available for $69.38. Priced at $89.78, the ZL50061 16K measures 27-by-27mm and is offered in a 272-ball PBGA. The ZL50063 16K is available at $70.25 in a 196-ball PBGA that measures 15-by-15mm.

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