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ARM rolls out transaction-level SystemC models

Posted: 24 Nov 2003 ?? ?Print Version ?Bookmark and Share

Keywords:arm? systemc? open systemc initiative? osci? cadence?

ARM Ltd has announced the availability of the transaction-level SystemC models of its cores that are targeted for system-level verification. The ARM1136J-S System C processor models and the ARM1136JF-S SystemC processor models will be available as part of the RealView Model Library. Additional SystemC models of ARM processors and the complete ARM PrimeXsys platform will be available by the end of Q4 2003.

The models leverage a joint donation to the Open SystemC Initiative (OSCI) by ARM, Cadence and STMicroelectronics which will accelerate the development of a standard in this area, enabling the rapid deployment of IP for system-level modeling.





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