Renesas CMOS achieves high-speed operation

Renesas Technology Corp. has developed an SOI (Silicon On Insulator) CMOS device technology with a new structure that achieves faster operation while reducing the operating voltage.

Following trial fabrication of SRAM in which the technology was applied to a 130nm SOI CMOS process, test results showed an approximately 20 percent reduction in lower-limit operating voltage from 0.6V to 0.5 V together with an approximately 35 percent improvement in operating speed.

Target applications include next-generation microcomputers and SoC devices.