Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > EDA/IP

Aptix releases prototyping system for block and IP designers

Posted: 18 Dec 2003 ?? ?Print Version ?Bookmark and Share

Keywords:aptix? fpga? prototyping system? pathfinder ip validation station? altera?

Aptix Corp. has developed a relatively small, inexpensive FPGA-based hardware-prototyping system for intellectual-property and IC-block design.

The Pathfinder IP Validation Station uses a single Altera Corp. Stratix FPGA and Aptix's Expeditor co-emulation software.

The Pathfinder box is about the size of a laptop computer and can be ordered from Aptix with a Stratix EP1S30 or EP1S80 device, allowing users to program in the equivalent of 470,000 ASIC logic gates and up to 7.4 million bits of embedded RAM.

The price, which starts at $30,000, is far less than that of emulation systems or larger prototyping systems, the company said.

The Expeditor software allows designers to use their simulation testbenches to provide stimulus and check response, Aptix said. It also supplies debugging capabilities.

Aptix claims the Pathfinder IP Validation Station will cut regression test times by orders of magnitude compared with software simulators. Designers can also use transaction-level testbenches on it.

Michael Santarini

EE Times

Article Comments - Aptix releases prototyping system fo...
*? You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.

Back to Top