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Startup promises 'algorithm to tapeout'

Posted: 01 Jan 2004 ?? ?Print Version ?Bookmark and Share

Keywords:pico? vliw? C-language algorithm? synfora? mpeg?

Leveraging technology from Hewlett-Packard's research labs, EDA startup Synfora Inc. announced plans to offer "algorithm to tapeout" synthesis. The offering combines configurable IP with architectural exploration and configuration tools.

Synfora's Program-In, Chip Out (Pico) product line, based on HP's Pico research project, will let users create C-language algorithms for blocks such as MPEG or MP3 decoders. It will evaluate alternatives and generate synthesizable RTL code. Designers can use a programmable very-long-instruction-word (VLIW) processor, a configurable pipeline of processor arrays or both.

"Because we've got the underlying IP, we can predict area and performance accurately and allow high-level trade-offs," said Simon Napper, CEO of Synfora.

Four of Synfora's founders came from HP's Pico project, which was discontinued following HP's merger with Compaq. Synfora has obtained IP and patent rights from HP, which holds a minority stake in the startup. Synfora employs around 20 and has raised about $6 million in venture capital.

Vinod Kathail, a Synfora founder and now its CTO, was principal scientist and R&D manager with responsibility for the Pico project at HP Labs. Napper, previously CEO of InnoLogic Systems, a provider of formal-verification tools, was also vice president of marketing at Epic Technology before Synopsys acquired it.

Napper said Synfora's combination of EDA software and configurable IP is unique. Both available pieces of IP are important, he said. While the VLIW processor handles control-intensive C code, the pipeline of processor arrays (PPA) accelerates compute-intensive code, revving such algorithms as MPEG and MP3.

Pico is intended as a block-level tool, used to implement what Napper called "application engines." Most chips, he noted, will also have a system processor, USB or PCI interfaces and memory controllers, but Pico does not implement those portions. Blocks typically range from 20,000 to 500,000 gates, excluding memory.

Synfora is targeting digital and audio video, imaging, wireless, encryption and handheld appliances. Benchmarks include such blocks as a horizontal/vertical filter, H.264 motion estimator, pixel scaler, MP3 subband synthesis, Viterbi decoder and Huffman JPEG decoder.

Napper called the RTL code generated by Pico "very competitive" with hand-coded RTL in terms of area and performance. One reason, he said, is that the Pico tool can rapidly run through a number of possible implementation alternatives, whereas RTL coding tends to be a "one-shot" deal.

Pico users provide ANSI C code for an algorithm along with area, performance and cycle time constraints. The tool exploits parallelism in the algorithm and evaluates performance/area trade-offs to create possible implementations, in an exploration process called a spacewalk. The tool creates a set of Pareto optimal implementations - that is, the best implementations across a range of performance and area trade-offs. From the Pareto set, users select any single point to synthesize into RTL.

The user can select which code goes into which IP or let the tool figure it out. Typically, "for" loops go into the PPA and the rest of the code into the VLIW processor.

Synfora offers a true behavioral-synthesis tool, said Kathail. "Starting from C, we look at the maximum amount of parallelism we can add. Then we look at the performance requirements and figure out the resources you need." Pico allocates resources, times the operations and determines storage requirements. The output is synthesizable RTL, synthesis scripts and a testbench. Pico can generate cycle-accurate C models with SystemC wrappers.

Napper said STMicroelectronics will tape out a DVD chip that contains a Pico-designed block next month.

Synfora plans to announce its initial product this quarter, available both off-the-shelf and through a service in which Synfora will produce designs for customers.

- Richard Goering

EE Times

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