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EDA outlook positive in Asia-Pacific

Posted: 01 Jan 2004 ?? ?Print Version ?Bookmark and Share

Keywords:eda? library? design tool? verification? pcb?

Daniel Yang is Pacific Rim Managing Director for Mentor Graphics Corp.

This year, Mentor Graphics expects continuous growth in the Asia-Pacific. On the strength of our new products, we expect our product revenue to grow faster than the EDA average. However, we also expect that our maintenance revenue will be essentially flat as customers with large installed bases continue to reduce their maintenance commitments.

PCB is continuously a strategic part of the company's business - and we are continuing to invest heavily in R&D and technology acquisitions to keep ahead of the rapidly advancing PCB and IC/FPGA technology. We are happy to support customers using mixed environments. Customers can now take advantage of Mentor's technology within their existing design flow, including libraries and design data. This environment eliminates the burdens of jumping between tools to get jobs done.

The verification crisis will continue as long as methodologies are structured with verification as an afterthought to design. Mentor has a design-verification approach that leverages products spanning multiple levels of abstraction and system domains. This enables designers to verify their work throughout the design process, avoiding the traditional verification problem where flaws are only discovered as the design is completed, making them costly and lengthy to fix.

Our scalable verification platform is currently one of the most comprehensive EDA vendor tool for functional verification. It includes product enhancements that enable verification to be performed at the earliest stages of design. The platform is centered on the ModelSim simulator, which has been expanded in capability to provide a system-level verification and debugging environment for complex ASIC and SoC designs.

For the physical design area, we are expanding the company's Calibre design-to-silicon platform to answer the trends spurred by new design flows and manufacturing requirements at 90nm. The latest addition to the Calibre platform, Calibre xRC, addresses the need for rapid, high-capacity, transistor-level parasitic extraction to enable more accurate post-layout analysis and ensure first-pass silicon success.

In nanometer design, the handoff between IC layout and manufacturing has changed. In previous technologies, the handoff was a simple DRC/LVS check at tapeout. Now it is a multi-step process, where the layout database is modified so the design can be manufactured. This presents a host of challenges. Issues arise concerning process effects, photolithography, data volumes and acceptable yield.

Mentor continues to execute on a strategy that provides individual designers and design teams with completely interoperable tool flows that manage the complexity of today's FPGAs. We were the first to integrate design creation, synthesis and simulation, and look to extend data connections with more tools in the FPGA design flow.

Every FPGA must be placed on a PCB. Integrating complex FPGAs onto a PCB may result in expensive PCB re-spins due to the introduction of manual data entry errors. Mentor Graphics offers an integrated FPGA and PCB design flow that automates the physical chip and board integration process.

- Daniel Yang

Pacific Rim Managing Director

Mentor Graphics Corp.

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