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Xilinx design targets Edge equipment market

Posted: 06 Jan 2004 ?? ?Print Version ?Bookmark and Share

Keywords:xilinx? reference design? ethernet aggregation reference design? sonet/sdh?

Xilinx Inc. has developed a free, fully functional reference design that is targeted for the metro and Edge equipment markets.

The Ethernet Aggregation Reference Design provides SONET/SDH equipment designers with integrated solutions, with flexible GFP processing functions as well as support for different Gigabit Ethernet to Sonet port configuration. The product includes Gigabit Ethernet MACs, a SPI-4.2 interface, optional Frame Mapped GFP adaptation, traffic management and control plane functions. It utilizes Virtex-II Pro embedded RocketIO serial transceivers to implement standard PHY modules for Gigabit Ethernet and the embedded PowerPC 405 microprocessor provides control plane management functions, including Ethernet port statistics-gathering and data plane status and control, with no external memory.

Utilizing the company?s Virtex-II Pro Platform FPGA, the reference design provides metro and edge equipment system designers with high performance integration using RocketIO Transceivers, logic, PowerPC, BlockRAM and LVDS I/Os.





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