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'Obfuscators' render Verilog, VHDL unreadable

Posted: 16 Jan 2004 ?? ?Print Version ?Bookmark and Share

Keywords:semantic designs? obfuscator? verilog 2001? vhdl? c/c++?

Providing a new approach to IP protection, software engineering firm Semantic Designs has released production-quality "obfuscators" for Verilog 2001 and VHDL. The products render source code unreadable but executable, making reverse-engineering difficult.

Semantic Designs announced its intent to provide a Verilog obfuscator in March 2003. Ira Baxter, Semantic Designs CEO, said his company's first Verilog obfuscator was based on Verilog 1995, which he described as "nice in theory but not very useful in practice because too many vendors offered halfway-to-Verilog 2001 features."

Semantic Designs provides a variety of tools based on the company's generalized compiler technology. These include source code formatters, obfuscators, and browsers, as well as software quality assessment and improvement tools. Language support includes C/C++, Pascal, Fortran, Java, Visual Basic, Ada and others.

The Verilog Source Code Obfuscator reads in Verilog code, and scrambles it to make it difficult to understand. It handles full Verilog 1995 and 2001, and replaces names with nonsense names without affecting functionality. Users can define a list of preserved names. It also strips comments and removes most source code structure.

Likewise, the VHDL Source Code Obfuscator offers a user-definable list of preserved names, and a pre-defined list of commonly-used VHDL system identifiers. Both of the HDL obfuscators require no changes to compilation or execution procedures or environment, Semantic Designs claims.

- Richard Goering

EE Times

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