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Xilinx rolls out latest FPGA design tool version

Posted: 08 Mar 2004 ?? ?Print Version ?Bookmark and Share

Keywords:xilinx? real-time debug? verification software? fpga? chipscope pro 6.2i?

Xilinx Inc. has release the latest version of its real-time debug and verification software for FPGA design.

According to Xilinx, the ChipScope Pro 6.2i takes advantage of the reprogrammable nature of its FPGAs to deliver flexibility and speed during the logic and embedded systems debug phase of a design.

One of the key capabilities in the new version is the addition of the second generation Agilent Trace Core (ATC2), which links Xilinx ChipScope Pro 6.2i to Agilent's 16900, 1690, and 1680 series logic analyzers.

The ATC2 core enables engineers to capture and analyze on-chip FPGA signals directly with an Agilent logic analyzer. Because of this, engineers can configure their FPGA, probe internal FPGA signals at system speed, and correlate them to signals captured elsewhere on the board, using their Agilent logic analyzer and a Xilinx programming cable.

"The tool integration between Xilinx and Agilent Technologies will revolutionize the way engineers approach logic verification," said Rich Sevcik, executive VP of FPGA products at Xilinx. "ChipScope Pro combined with FPGA Dynamic Probe has the potential to slash verification times by up to 50 percent, improving the most time-consuming and costly part of logic design."

The configurable ATC2 core uses up to 32 signal banks, with each signal bank able to support up to 128 signals. With optional 2X pin compression, designers can access up to 8192 internal FPGA signals in real-time. The Xilinx programming cable then provides the communication link between an Agilent logic analyzer running the FPGA Dynamic Probe application and the ATC2 core.

ChipScope Pro is a real-time, on-chip debug and verification system available for logic design. It allows engineers to insert low-profile, software debug cores (ILA, IBA, and ATC2) into their design or netlist to capture either logic or embedded processor bus signals. The user can then define trigger conditions and capture signal activity on-chip, operating at system speeds, while the FPGA is interacting with the rest of the system. ChipScope Pro also allows the user to place virtual inputs and outputs to simulate design stimulus and capture and display output to reflect activity.

A free downloadable 60-day evaluation version is available from Xilinx's website, while all in-maintenance ChipScope Pro customers will begin receiving ChipScope Pro 6.2i immediately for free.





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