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Three chip giants form European technology project

Posted: 11 Mar 2004 ?? ?Print Version ?Bookmark and Share

Keywords:infineon? philips? stmicroelectronics? cmos logic? nanocmos?

Europe's three largest semiconductor companies - Infineon, Philips and STMicroelectronics - are teaming up with a network of European technology research laboratories to kick off a new CMOS logic technology development project called NanoCMOS.

The research initiative includes 24 million euros ($29.7 million in seed funds from the European Commission).

The project's goal is to demonstrate the feasibility of 45nm compatible CMOS logic technology in SRAMs by the end of 2005. Simultaneously, the partners will pursue exploratory research on next-generation 32- and 22nm technology nodes.

With at least another 24 million euros provided by participants, NanoCMOS organizers said they are confident that they have the resources to develop necessary changes in materials, processes, device architectures and interconnections to keep pushing the limits of semiconductor performance and density.

Besides the three European semiconductor giants, participants in the project include: the two largest European research institutes - CEA Leti (France) and IMEC (Belgium); three research laboratories coordinated by the Fraunhofer-Gesellschaft (Germany); eight research laboratories coordinated by the CNRS (France); one research laboratory from the Technical University of Chemnitz (Germany); three companies - Ion Beam Services (France), ISILTEC (Germany) and Magwel (Belgium); and ACIES Europe (France), which will handle aspects of the project.

European semiconductor companies are keenly aware of diminishing R&D investments from European governments. They are also catching flak from some European authorities over "fragmented research" activities.

Guillermo Bomchil, European project manager at STMicroelectronics, who heads the NanoCMOS Project, said the project will avoid duplication with similar projects elsewhere in Europe, and will prioritize research options.

In the past, for example, European Commission-funded Information Society Technology (ITS) projects had "no formal links" to Eureka-labeled technology projects such as Medea+. "They were considered two separate activities backed by two different sources of funding," Bomchil said, since Eureka-related projects require each participant to provide national funding.

In contrast, NanoCMOS is designed as an "integrated" project, said Bomchil. The group will promote dialog with Medea+ and other EC-funded ITS projects. Such efforts include identifying projects while organizing workshops between different research projects to foster the transfer of knowledge, he said. "We are willing to tune our project and modify our research options" once the group learns that other projects have already reached certain conclusions in regards to 45nm technology node, or identified technology options that may work better for 32nm node, he added.

The project's first phase is expected to last 27 months. Funding for the first 18 months - 13.6 million euros - has been already released by the European Commission for distribution among project partners.

Although the Crolles2 facility jointly operated by Motorola Inc., Philips and STMicroelectronics, is expected to play an important role in integration and validation of the 45nm technology node in industrial 300nm wafer manufacturing, Motorola is currently not a NanoCMOS member. Bomchil said "Motorola is a natural partner." However, he declined to comment on when Motorola might join the project.

NanoCMOS, originally conceived as a four-year program, is looking for ways to extend its life. The partners is drafting a proposal to the EC for the second phase of the project, starting in 2006. This phase will aim to demonstrate the feasibility of the 32- and 22nm nodes, according to Bomchil.

-Junko Yoshida

EE Times

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