Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
?
EE Times-Asia > EDA/IP
?
?
EDA/IP??

Toshiba used Synopsys platform for SoC designs

Posted: 03 May 2004 ?? ?Print Version ?Bookmark and Share

Keywords:synopsys? toshiba? galaxy design platform? design compiler? designware library?

Synopsys Inc. has announced that Toshiba Corp. has taped out multiple 90nm SoC designs for its audiovisual and office equipment product lines using Synopsys' Galaxy Design Platform.

The designs were created using Design Compiler and DesignWare Library for synthesis, Power Compiler for dynamic and leakage power optimization, Physical Compiler and Astro for physical implementation, PrimeTime for delay calculation/static timing signoff, Star-RCXT for full-chip parasitic extraction signoff, and DFT Compiler SoCBIST for test.

According to Synopsys, Toshiba was able to significantly boost design productivity on its most recent design using the latest release of Astro, enabling a fast design turnaround time.

"Customers such as Toshiba are increasingly turning to design productivity solutions like Astro in order to get their products to market quickly," said Antun Domic, SVP and GM of the Implementation Group at Synopsys.





Article Comments - Toshiba used Synopsys platform for S...
Comments:??
*? You can enter [0] more charecters.
*Verify code:
?
?
Webinars

Seminars

Visit Asia Webinars to learn about the latest in technology and get practical design tips.

?
?
Back to Top