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IMEC extends nonvolatile memory to 9-bits per cell

Posted: 25 May 2004 ?? ?Print Version ?Bookmark and Share

Keywords:imec? ic design? nonvolatile memory cell?

IMEC, the independent research organization that specializes in IC design and manufacturing processes, has developed a prototype nonvolatile memory cell capable of storing 9-bits.

The technique could potentially be used to achieve a four-fold increase in memory density compared with current floating-gate memories for a given manufacturing process.

Normally a single memory bit is stored in each memory cell in flash memory, although Saifun Semiconductor Ltd (Netanya, Israel) has demonstrated the ability to store a single bit at each end of a flash memory floating gate. This type of flash memory is called "MirrorBit" by FASL LLC and "Nbit" by Macronix International Co. Ltd.

Saifun, announced a plan on Tuesday, May 18, 2004 to extend the technique to 4-bits per memory cell by combining two storage sites with two voltage levels per memory cell.

Meanwhile, researchers from IMEC (Leuven, Belgium) have developed a device they call a "ScanROM" that can store 9-bits per memory cell. Details of the device are to be presented in a paper due to be presented next month at the Symposia on VLSI Technology and Circuits to be held at Honolulu, Hawaii.

ScanROM is based on a dual-gate transistor with oxide-nitride-oxide charge-trapping dielectric underneath the drain-side gate. The researchers found that multiple bits are stored along the width of the device. By contacting the gates from both sides and applying an appropriate bias difference to each, individual bits are addressed for both reading and writing.

"We experimentally demonstrate reading and writing of 9-bits in a prototype cell," the authors said.

- Peter Clarke

Silicon Strategies

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