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Low-cost FPGAs readied for launch

Posted: 01 Jul 2004 ?? ?Print Version ?Bookmark and Share

Keywords:fpga? altera? cyclone 2? taiwan semiconductor? lattice semiconductor?

Another wave of low-cost FPGAs is headed for market as programmable-logic vendors escalate the fight to put their chips in tomorrow's plasma displays and fish finders.

Altera Corp. will describe its next bargain FPGA family, Cyclone 2. Slated to debut next year, the devices have been tuned for lower cost and will be manufactured in a 90nm process by Taiwan Semiconductor Mfg Co. Ltd.

Lattice Semiconductor Corp. is trying to gate-crash the FPGA duopoly of Xilinx and Altera with its own low-cost FPGAs, the ECP family. After stumbling in earlier attempts at the segment, "we [now] have an open field, and we're going to run," said Cyrus Tsui, Lattice's chairman and CEO. "All we need is 10 percent of the FPGA market."

Lattice will sell a basic FPGA with 20,000 logic elements for $49 each in production quantities starting in the third quarter. Altera, which promises to deliver samples of Cyclone 2 next February, said it will sell an FPGA with 50,000 logic elements for $50 by the second half of 2005.

Altera started shipping its first-generation Cyclone devices, based on 30nm design rules, in early 2003 as an alternative to Xilinx's low-cost Spartan family. Later that year, Xilinx announced its Spartan 3, a cost-reduced version of its Virtex 2 architecture and one of the first production chips manufactured with 90nm design rules.

Altera said that it has sold more than 3 million Cyclone devices since their introduction last year. They can be found in digital video cameras from Panasonic, wireless Internet access portals from Motorola and plasma displays from Samsung.

For Cyclone 2, Altera reduced the size of its logic elements for better density and favored adding more logic over I/Os to retain its die size. Altera promises to sell the Cyclone 2 at half the price of an equivalent-density Spartan 3 from Xilinx.

Lattice goes small

Lattice uses a less aggressive, 0.13?m process from Fujitsu for its ECP FPGAs. To drive down costs, Lattice designed the architecture to be compact. For example, 25 percent of the programmable function units can be converted into RAM; the rest are for logic only, saving die real estate.

In another cost-saving move, Lattice designed its ECP FPGAs so they can be matched with boot PROM devices made by outside vendors. The company believes this could reduce memory costs by a factor of four.

Altera's Cyclone 2 comes with as many as 150 hardwired 18 x 18 multipliers, which can be converted to twice as many 9 x 9 multipliers. Lattice offers one to eight programmable multipliers, depending on the configuration, that run at 250MHz.

Both companies have included special circuitry to interface with double-data-rate DRAM.

- Anthony Cataldo

EE Times

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