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AWR, TSMC team up for SiGe design platform

Posted: 28 Jul 2004 ?? ?Print Version ?Bookmark and Share

Keywords:applied wave research? awr? taiwan semiconductor mfg? tsmc? design platform?

Applied Wave Research Inc. (AWR), a provider of high-frequency EDA tools, announced an agreement with Taiwan Semiconductor Mfg Co. Ltd (TSMC) to jointly develop and deliver a design platform for TSMC's 0.35?m silicon germanium (SiGe) process.

The platform will include AWR's Analog Office RFIC design software, a TSMC 0.35?m SiGe process design kit (PDK) that is based on open software standards, and an end-user full product support package.

Under the agreement, both companies will develop a new set of process-calibrated and process-tuned device models for the 0.35?m SiGe process. The model set will include accurate HICUM bipolar transistor models as well as a comprehensive set of accurately tuned spiral inductor models. XMOD Technologies, a company specializing in RF device modeling, will provide the geometry scalable HICUM model libraries.

The new models will enable analog and RFIC designers to develop next-generation, high-performance wireless ICs quickly and easily. They will be packaged as part of a complete PDK based on the AWR unified data model and other open software platforms.

"A cost-effective RFIC design platform will be a welcome addition to the growing RF wireless design community worldwide, and particularly to emerging design markets," said Edward Wan, senior director of design services marketing for TSMC. "Our collaboration with AWR will provide advanced RF models and PDKs that differentiate TSMC RF process offerings, and will also allow us to more fully meet the library/PDK customization needs of customers."

The Analog Office solution

The Analog Office solution is claimed by AWR as the first complete IC design system in over a decade that is specifically architected and optimized from the ground up for analog and RFIC designs. According to the company, the 2004 version has been enhanced to provide the industry's most open, unified design environment, offering full interaction with a comprehensive and powerful set of integrated tools. The toolset spans the entire IC design flow, from system-level to circuit-level design and verification, for complete top-to-bottom and front-to-back analog and RFIC design.





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