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EverCAD platform suits mixed-signal SoC design

Posted: 09 Aug 2004 ?? ?Print Version ?Bookmark and Share

Keywords:eda&t? evercad software? cad? soc? verilog?

During the recently concluded EDA & Test Taiwan (EDA&T-Taiwan) Conference, EverCAD Software Corp. introduced several tools required in SoC designs, as well as a verification platform suite that promises to eliminate the bottlenecks in mixed-signal SoC designs.

The new platform includes the company's ADiT (Analog Digital Turbo simulator) and various interfaces that support mixed signal simulation with various Verilog and VHDL digital simulators, including Cadence's NC-Verilog, Synopsys' VCS and Mentor Graphics' ModelSim.

Featuring a single engine architecture, the ADiT mixed-signal device can perform simulations and analyses on digital, analog, mixed-signal, multi-level and multi-language. Extended products include ADiT-SPICE, ADiT-Turbo, ADiT-MOT, ADiT-HDL, ADiT-VPI, ADiT-FLI, ADiT-Crab, ADiT-AMS, AView and ADiT with S-parameter.

The AdiT also offers various functions and interfaces, such as Big-D and Big-A interfaces, fasting Big-A Solver and (Time-Domain) S-parameter. According to EverCAD, their new offering will become a powerful solution in various applications, especially in GHz level PCI Express and XAUI applications.

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