Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
?
EE Times-Asia > EDA/IP
?
?
EDA/IP??

Synopsys unveils DesignWare USB 2.0 OTG PHY core

Posted: 06 Sep 2004 ?? ?Print Version ?Bookmark and Share

Keywords:synopsys? designware usb 2.0? on-the-go phy core? otg phy core? tsmc?

Synopsys Inc. introduced its DesignWare USB 2.0 On-The-Go (OTG) PHY (Physical Layer) core targeted at TSMC's 90-, 130- and 180nm processes, as well as an extension of the Hi-Speed USB 2.0 PHY Core product line to the 90nm process node.

According to Synopsys, the DesignWare USB 2.0 OTG PHY is the industry's first 90nm USB OTG PHY core. It is interoperability tested and jointly certified with the company's digital USB cores, providing a complete drop-in solution with lower cost, form factor and risk.

"With the introduction of our USB 2.0 OTG PHY, designers can speed integration and reduce risk when designing a complete digital and mixed-signal OTG solution targeted to TSMC's most popular foundry processes," said Guri Stark, the company's VP of Marketing, Solutions Group.

"For designers at the leading edge of system design, our Hi-Speed USB 2.0 PHY and USB 2.0 OTG PHY in TSMC's 90nm process enable them to achieve USB 2.0 connectivity based on our USB-certified PHY architectures proven at 180nm and 130nm," added Stark.

The new OTG PHY handles HNP (host negotiation protocol) and SRP (session request protocol), which are the OTG-specific differences between the Hi-Speed 2.0 and the new OTG standard.





Article Comments - Synopsys unveils DesignWare USB 2.0 ...
Comments:??
*? You can enter [0] more charecters.
*Verify code:
?
?
Webinars

Seminars

Visit Asia Webinars to learn about the latest in technology and get practical design tips.

?
?
Back to Top