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Faraday unveils flexible net processor

Posted: 20 Sep 2004 ?? ?Print Version ?Bookmark and Share

Keywords:faraday technology? network processor? netcomposer-I? nc-I? fa626?

Taiwan's Faraday Technology Corp. is taking the wraps off its first stab at a network processor with the flexibility of structured ASIC programmability.

The NetComposer-I (NC-I) seems to be the culmination of an evolving strategy at Faraday, which wants to challenge the likes of the PowerPC and MIPS architectures in high-performance applications by using its unique advantage as an ARM architecture licensee. Getting a chip out the door is an important benchmark for the company, which has recently talked up its plans to win contracts from high-profile, high-margin communications companies such as Cisco Systems, Nortel Networks, Juniper and Siemens.

The Hsinchu-based ASIC design services and IP provider is pitching the NC-I, which costs $20, as a high performance NPU capable of packet inspection and processing in layers 4-7. It is stressing simplicity in the design, saying the NC-I has the low cost of an ASSP, and the flexibility and faster cycle time of a structured ASIC.

The NC-Is intended use is as a single chip for a vDSL gateway or as an accelerator for PowerPC/Pentium-based network appliances.

The NC-I includes Faraday's proprietary 500MHz ARMv4 CPU, called the FA626. It has 32KB of instruction and data cache each, a unified Level 2 cache, and a separate 32bit interface for accessing off-chip SRAMs.

The glue connecting these standard components is another pet project from Faraday. Instead of using a standard Amba bus, Faraday has designed a high throughput nonblocking crossbar switch, running at 64bit and 166MHz. Faraday designed the switch with the idea of giving system designers the ability to tweak traffic loads for bandwidth and latency and envisioned the architecture as more ideal for QoS dependent applications, such as high definition video.

The structured ASIC approach gives designers 0.5Mb of SRAM and 1.5 million gates of metal programmable cell array to implement IP.

The NC-I will be available as an NPU platform ASIC in the first quarter of 2005. It will combine low-leakage and high-speed transistors from the 0.13?m design library at Faraday's foundry partner, United Microelectronics Corp. Turnaround time is about 30 days, the company said. Faraday offers a $20 price to orders of at least 1,000 units.

- Mike Clendenin

EE Times





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