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Magma panelists explore whether DFM is the real deal

Posted: 23 Sep 2004 ?? ?Print Version ?Bookmark and Share

Keywords:magma design automation? mentor graphics? ic designer? dfm?

After much bravado, EDA vendors like Magma Design Automation and Mentor Graphics are starting to deliver viable design-for-manufacturability tools, or DFM-savvy tools. But will they be able to shield IC designers from dealing with manufacturing problems that would seemingly add more steps to the design process?

EDA vendors on a panel Friday (Sept. 17) at the Magma Users Summit on Integrated Circuits (MUSIC) said that's the idea, but DFM is going to become the problem of everyone in the design flow, not just the problem of manufacturing.

Panel organizers brought in EDA gadfly John Cooley to be the DFM contrarian, and he did his job. "DFM stands for dollars for marketing, and is nothing more than an attempt by EDA vendors to sell another $300,000 tool to users that they don't need," Cooley said.

Traditionally, he said, yield issues have been ironed out and processes have matured by the time the mainstream market moves to a new process node. But other panelists said that won't be the case with new process geometries.

"DFM is an elephant and we all experience different parts of the animal," said panelist Barry Hoberman, president and CEO of library vendor Virtual Silicon.

John Kibarian, founder, president and CEO of PDF Solutions Inc., said new issues like process variability and on-chip variability at process nodes of 65nm, and even down to 45nm, means just about every design move has some effect on yield.

Kibarian's company helps foundries improve their processes and yields, collecting a royalty based on the improvement. At the last Design Automation Conference, PDF expanded into the EDA market when it announced that it had integrated a yield improvement utility into Magma's RTL-to-GDSII tools. Users can access it for an extra fee.

"Our sales pitch is that it all comes down to calibration and characterization," said Kibarian. "How do you characterize silicon? You've got to know at the microstructure level what fails and what doesn't and how many times it fails." Kibarian noted that it will become increasingly necessary for design tools to understand these failures so users can make informed tradeoffs to get the right mix of yield, timing and power for a given design.

Naveed Sherwani, president and CEO of Open Silicon, questioned whether EDA vendors can be trusted to come up with a real DFM solution. "EDA vendors make all their money by the time the design is done," said Sherwani. "By the time you hit the yield problem, they are gone."

Sherwani said that if EDA companies were serious about yield, they would adopt a yield model like PDF's.

Sherwani suggested that if EDA companies want to get serious about yield at 65nm and below, they need to meet with foundries and manufacturers years in advance. Sherwani noted that EDA vendors have traditionally been reactionary, adding new functionality to older tools as users encounter problems.

Hoberman said a big problem is that a given foundry derives safe process characterizing boundaries (design rules) by running several wafer lots. They then hold much of the data about variability and their process close to their vest, seeing it as a competitive advantage. Doing so, however, hinders the EDA company's ability to ensure tools account for DFM issues as they pop up, forcing them to react.

Panelists noted that vertically-integrated companies, like IBM with design and fabrication in-house, have an advantage over the COT foundry model because the former can iron out DFM issues before design process begins.

"Foundries don't have a good set of reasons for supporting external DFM efforts," said Hoberman. "There may be activity that goes internal to the foundries with respect to how they statistically find their rules. But once they find those rules, they get those out on the market. There are a lot of forces keeping them from changing those rules."

Joe Sawicki, general manager of the Design to Silicon Group at Mentor Graphics, said "DFM will touch every tool." Sawicki cited Magma's latest revision to its router, which reduces the number of vias it implements in a design.

"That might not be the DFM solution to solve all problems, but it makes a major impact on the next group of tools when you're trying to optimize those vias for production, through a process window," said Sawicki.

Premal Buch, general manager of the analysis and signoff business unit at Magma, said current design rules cannot capture all the manufacturability issues, adding that the sheer number of design rules is exploding.

Design rules, too, noted Buch, are implemented too late in the design process in today's flow.

Buch, who designed Magma's Blast Fusion line of products, is in the process of making those tools increasingly DFM-savvy adding "DFM/Y" technology to the Blast Fusion line. Buch noted that a new, but unreleased version does gain-based logic and physical synthesis, yield-driven routing and physical verification, all clocked by a statistical timing tool.

- Mike Santarini

EE Times





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