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Microchip saves design time with Synopsys Circuit Explorer

Posted: 08 Oct 2004 ?? ?Print Version ?Bookmark and Share

Keywords:microchip technology? synopsys? circuit explorer? optimization? analysis?

Microchip Technology Inc. has standardized on Synopsys Inc.'s Circuit Explorer optimization and analysis solution for its complex analog designs. Microchip selected Circuit Explorer because it enabled them to take weeks off of their design cycle and eliminate the tedious manual tasks usually associated with complex analog designs.

"With Circuit Explorer's optimization and analysis capabilities, we were able to accomplish in days what would have taken weeks with other tool flows," said Craig Filicetti, simulation manager at Microchip. "Circuit Explorer's optimizer doubled the speed of one of our designs while shrinking the circuit's area 20 percent. We completed this design in two weeks using Circuit Explorer, which would have taken 10 weeks to do by hand. Circuit Explorer's analysis capabilities, alone, were an improvement over the manual design flow. With the click of a button, we were quickly able to understand our circuit performance over all of the PVT (process, voltage and temperature) corners. We evaluated several tools for optimization and analysis, and determined that Circuit Explorer was clearly the best tool for our needs."

Microchip engineers are using Circuit Explorer's graphical data display to explore the design space and quickly comprehend the performance tradeoffs within their circuit architectures. When designers used a manual design flow, they were never exposed to the circuit's trade-off options. Taken together, Circuit Explorer's optimization, analysis and trade-off capabilities can increase circuit performance, reduce costly re-spins and shorten time to market.

According to Synopsys, the Circuit Explorer's optimization capabilities enable designers to have greater control of their designs. It assists designers by automating the iterative task of sizing each device in their circuit and running numerous simulations to meet performance specifications. This not only saved time for Microchip engineers, by freeing them up for other tasks, but also automatically validated their overall design measurements and PVT corner conditions.

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