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TSMC, Freescale to develop 65nm SOI technology

Posted: 19 Oct 2004 ?? ?Print Version ?Bookmark and Share

Keywords:tsmc? freescale semiconductor? silicon-on-insulator? soi? transistor?

Taiwan Semiconductor Mfg Co. (TSMC) and Freescale Semiconductor Inc. have signed an agreement to jointly develop a next-generation silicon-on-insulator (SOI) transistor front-end technology targeted for the 65nm advanced CMOS process node. The three-year agreement also provides TSMC with manufacturing rights to Freescale's 90nm silicon-on-insulator (SOI) technology.

The collaboration is expected to enable faster time to market of 65nm SOI technology for innovative applications in a variety of markets. During the joint development of the 65nm SOI high-performance transistor front-end technology, the two companies are expected to develop independently their own 65nm metallization back-end technology tailored to their specific market applications.

Freescale will apply the overall technology to 65nm SOI chips at 300mm in the Crolles2 joint R&D and pilot manufacturing facility in France, which it shares with Philips and STMicroelectronics. TSMC may apply the technology in its Taiwan facilities, with a high-speed version that targets performance-driven applications in networking and computing and a low-power version for handheld and portable applications.

Currently, Freescale is establishing a 90nm CMOS SOI manufacturing platform in its Dan Noble Center facilities in Austin, Texas, for next-generation high performance networking and computing products. Meanwhile, TSMC has been independently developing SOI technology starting from 0.13?m technology node since the late 1990s.





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