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PLD war: There can only be one?

Posted: 29 Oct 2004 ?? ?Print Version ?Bookmark and Share

Keywords:programmable logic? xilinx? altera? virtex-4? fpga?

Vij: We want to be twice the size of our nearest competitor.

If there can only be one in the programmable logic industry, Xilinx will make sure it gets that spot with easy victory. But will rival Altera allow it?

Many say that programmable logic vendors keep on making new products using a technology that has not changed much in years. Xilinx attempts to prove them wrong as it embarks on a grand plan to revolutionize the changing face of logic design with the recent release of its Virtex-4 family of customizable FPGAs.

Dubbed as the world's fastest and highest capacity FPGA, Virtex-4 has low programmable system cost, provides most complete design solutions and reduces power consumption by 50 percent. Using partner UMC's 90nm chip-making process technology, the new family of FPGAs boasts of modifications based on feedback from some 800 Xilinx clients worldwide, building upon a legacy of customer success with Virtex II and Virtex II Pro platform FPGAs.

"We asked customers not only what they wanted in a logic platform, but also what they wanted in DSP, logic and connectivity," said Sandeep Vij, VP of worldwide marketing at Xilinx. "Our solution was architected for customers with their feedback."

With over 100 technical innovations, Virtex-4 FPGAs showcase 17 devices across three domain-optimized platform architectures: LX for logic-intensive designs; SX for high-performance signal processing; and FX for high-speed serial connectivity and embedded processing.

"It's all about customization," said Chuck Tralka, director of product marketing, advanced products division at Xilinx. "Different customers have different FPGA requirements, so why pay for something you don't need?" With the new ASMBL architecture, customers can choose from the three domain-optimized platforms, he added.

Already, Virtex-4 faces criticism from Xilinx rival Altera. Ben Lee, VP for Asia-Pacific at Altera, claims that what Virtex-4 offers is something Altera has been offering for years.

"The Virtex-4 announcement is a probable reaction to Altera's Stratix II launch, which we positioned as the first and only high density FPGA product in the market," said Lee. "ASMBL isn't new. They have announced it twice before. Now they're announcing it again to counter our Stratix lineup. They are basically one year behind."

"We're the first company to put in embedded and PLL blocks. We've been doing their ASMBL architecture, without the fancy acronyms," he said. "Stratix II is already 50 percent faster than their Virtex II Pro devices, so even if they skipped Virtex-3 and went on with Virtex-4, we believe Stratix II is at least 20 percent to 30 percent faster than their Virtex-4."

Xilinx's Tralka contests that Virtex-4 is a major technology advancement, and hence, is not like their routine product improvement. "Virtex-4 is much more significant than our routine product improvement," he said. "Domain customization is the single biggest technology difference."

Lee said that while Altera uses double-oxide process to address power issues at 90nm, Xilinx's Virtex-4 settles for a triple-oxide process which is more costly. He also added that by using FSG, performance suffers by at least 10 percent.

"The triple-oxide process is expensive. We've studied that technology and found out that it's not as manufacturable as the mainstream process. Virtex-4 is a based on custom FSG process; they simply won't leverage the manufacturing cost. Altera uses low-k technology, which is a lot better," Lee said.

Months back, Xilinx has used low-k technology in its Virtex II Pro devices, but had to abandon that process due to some "technology problems."

"We're not using low-k in Virtex-4; it's not necessary. We've used low-k in our Virtex II Pro devices before, but it affected our yield. We found the performance advantage to be smaller than expected," Xilinx's Tralka said. "In the future, we might decide to use it again, but we don't think it's necessary now."

Grand plan

Already No. 1 and holding about 60 percent market share, Xilinx doesn't seem content. "Historically, we've exceeded the semiconductor industry average growth, and we have strong plans to continue gaining market share," said David Loftus, VP for sales, Asia-Pacific region. "The Asia-Pacific in particular shows a tremendous growth opportunity."

"From a revenue basis, Xilinx is now 60 percent larger than its nearest competitor and has gained over 20 percent market share over the last five years--the largest increase in market share of any company in any segment of the semiconductor industry during that time frame," said Vij. "We see our market share gap with Altera widening in the next few years."

"Right now, we have three big targets. First, we want to be twice the size of our nearest competitor, worldwide. Second, we want to achieve $2 billion revenue. Third, the bigger goal beyond that is how we can achieve $5 billion mark," said Vij.

Although Xilinx doesn't really give much of an eye on competition, Vij noted that reaching their specific target won't be as smoothsailing. Theoretically, you don't want to keep on growing and growing until you burst, Vij added. "In time you'll need some healthy corrections and then continued growth. It's better because we build less capacity."

Xilinx recently has to revise its overall revenue forecast by 5 percent to 7 percent sequentially, compared to the original guidance of 2 percent to 4 percent higher revenue, mainly due to excess inventories and softening orders from U.S. customers.

Sharpening tools

Also concerned with its own territory, the company has made some reorganizations to further underscore its commitment with the DSP and embedded systems markets. "We are focusing heavily on these two new areas," said Vij.

Xilinx has recently announced the creation of a dedicated DSP division, which aims to take a bigger slice of the $2 billion signal-processing segment currently served by ASIC and ASSP technologies. At the same time, Xilinx has announced the formation of an embedded processing division.

Industry veterans Omid Tahernia serves as VP and general manager of the DSP division, while Mark Aaldering heads the new embedded processing division.

- Jerico Abila

Electronic Engineering Times - Asia





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