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JTAG test adjunct to focus on Gbps nets

Posted: 02 Nov 2004 ?? ?Print Version ?Bookmark and Share

Keywords:ieee-1149.6? scanworks jtag test system? asset intertech? scanworks? isp?

Adding IEEE-1149.6 boundary-scan functions to its existing ScanWorks JTAG test system, ASSET InterTech (IEEE 1149.1/JTAG) will soon be offering the capability to test 1Gbps to 10Gbps serial buses on PCBs.

The ScanWorks boundary-scan test and ISP (in-system programming; loading software or data into programmable devices after they've been connected to a PCB) environment is currently used by companies such as Cisco, Lucent Technologies, Agilent Technologies, Hewlett-Packard, Ericsson, Intel, Raytheon, Solectron and Rockwell Collins.

First support for the new spec

ASSET claims it's now the first boundary-scan tester to support the new IEEE 1149.6 Boundary-Scan Standard for Advanced Digital Networks spec. It defines test methodologies for buses that use serial AC-coupled chip-to-chip interconnects and/or differential signaling.

Industry approaches that use AC-coupled chip-to-chip interconnects and/or differential signaling include Gigabit Ethernet, and Fiber Channel. Some systems, including high-speed fiber-optic switching equipment, use hundreds, (if not thousands), of these high-speed serial links, so there's a multiplying need for this kind of testability.

AC and DC

Typically, boundary scan (commonly referred to as JTAG, derived from the Joint Test Action Group that defined the specification) only tests DC-coupled device networks on a PCB. With its new 1149.6 capabilities, ScanWorks can test both DC-coupled and high-speed AC-coupled nets at the same time. "IEEE-1149.6 builds on the foundation of the original IEEE-1149.1 standard," said ASSET VP of sales and marketing Alan Sguigna. "We've stayed ahead of other suppliers who may have gotten distracted, so we're able to incorporate advanced technologies on the foundation of ScanWorks." Supporting 1149.6 testing as an added feature, ScanWorks's automatic test generation tool examines the design of a PCB to determine whether 1149.6 devices are present, and if 1149.6 tests are needed. If they are, ScanWorks will automatically generate 1149.6 test patterns and include them into a test suite for the board.

The 1149.6 tests are applied concurrently with standard 1149.1 JTAG tests. The results of an entire test suite are then reported to the user. If necessary, thorough diagnostics can then be performed.

Greater detection and diagnostics

According to Bill Eklow, chairman of the IEEE Std. 1149.6 working group, the 1149.6 standard was motivated by a need to define boundary scan structures and methods required to ensure robust and minimally intrusive boundary scan testing of advanced digital networks not adequately addressed by existing standards. "The methods defined in 1149.6 provide greater detection and diagnostic capabilities than existing test structures and methods," stated Eklow.

ScanWorks with 1149.6 test capabilities will be available from ASSET by year's end. Limited-term licensing for a ScanWorks Interconnect Development Station will begin at about $6,000. Standard and network licenses will also be available.

- Alex Mendelsohn

eeProductCenter





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