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Cadence, ARM tackle signal integrity issues with SI views

Posted: 03 Nov 2004 ?? ?Print Version ?Bookmark and Share

Keywords:cadence design systems? arm? processors? soc? signal integrity?

Cadence Design Systems Inc. and ARM announced the availability of signal integrity (SI) views from ARM for foundry program partners. For designers incorporating hardened ARM processors into their designs, these views give access to critical data required to perform detailed voltage drop and SI analysis. This analysis speeds time-to-market of nanometer-scale system-on-chip (SoC) designs by rapid detection and resolution of critical SI issues. The ARM processor views support Cadence tools, including CeltIC crosstalk analysis and repair and VoltageStorm power grid analysis, which are core technologies within the Cadence Encounter digital IC design platform.

As customers move to 130nm and below, voltage drop and SI issues pose increased risks of chip failure and poor yield. When combined with the growing use of hardened IP, the risk of critical design problems due to SI issues is even greater because designers previously had no SI views for the hardened IP. This joint solution provides the critical characteristics of hardened IP processors provided by ARM that will enable designers to find and correct SI problems earlier in the design process, speeding time-to-market for ARM Partners.

The signal integrity views are available from ARM for its foundry program partners.





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