Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
?
EE Times-Asia > EDA/IP
?
?
EDA/IP??

Xilinx to wrestle ASIC vendors with EasyPath revisions

Posted: 15 Nov 2004 ?? ?Print Version ?Bookmark and Share

Keywords:xilinx? asic? easypath fpga?

Xilinx is intensifying its competition with ASIC vendors with the recent revisions in its EasyPath FPGA technology. EasyPath, according to Xilinx, is the industry's lowest cost and only conversion-free replacement to ASICs for volume production.

The expanded EasyPath product line now supports Xilinx's Spartan-3 and Virtex-4 chips at half the price of comparable structured ASIC offerings. This new addition provides customers the widest selection of 28 silicon devices to choose from.

According to Babak Hedayati, senior director of product solutions marketing at Xilinx, EasyPath is driven by two words: flexibility and cost. As compared to ASICs, engineers prefer the FPGAs because they can easily make "real-time" revisions in the design, he added.

"Customers asked us to give them enough flexibility rather than absolute fixed capability," Hedayati said. FPGAs provide that flexibility, and EasyPath reduces the cost of using FPGAs. You need not buy those expensive ASIC tools for simulation, he added.

Using ASICs in a design is just like building an entirely different platform, Hedayati said. "Why would you spend on building an application when what customers really want to do is make an application that's useful and differentiated in the marketplace? FPGAs are readily available so they can go to volume production any time."

"We now give our customers the lowest device price with the added flexibility," he said. The low cost and flexibility can be attributed to the use of the inherent redundancy of FPGA devices and a patented testing methodology, he added.

Hard way

Historically, the hard-wire method was used to reduce the cost by converting silicon into smaller pieces, thereby reducing the size of the FPGA architecture. But as process nodes shrink, performing the hard-wire becomes more difficult.

"The hard-wire process paid off with higher technology nodes. But now with 90nm, going to 65nm and then 45nm, it just doesn't make sense anymore," Hedayati said. "There's a lot of hard IP in the FPGA functions that are optimized for price perspective, and you just can't shrink that. You do that and you try to remove the functionality from the platform. NREs get more expensive as we go to lower geometries."

Hence, Hedayati said, it is important to get a solution at the lowest cost. EasyPath addresses just that, he added.

EasyPath FPGAs use the same silicon as their FPGA counterparts, eliminating the need to modify boards that are certified to be functional. "Silicon doesn't change; only the testing and verification," Hedayati said.

Two important additions to the EasyPath technology, exclusive to Spartan-3 and Virtex-4 devices, are the in-system engineering change orders (ECOs) and support for two designs in one device.

The in-system ECOs allow designers to make changes to a lookup table and/or the drive strength and slew rate of devices. The support for two designs, meanwhile, allows two designs in a single device to be configured and used in production with two bit streams, thereby reducing the bill-of-materials and inventory costs.

"EasyPath is a way of accelerating our revenues as we try to capture the $16 billion market currently being served by traditional ASIC vendors," said Cheng Hing-Nan, marketing director, Xilinx Asia-Pacific.

- Jerico Abila

Electronics Engineering Times-Asia





Article Comments - Xilinx to wrestle ASIC vendors with ...
Comments:??
*? You can enter [0] more charecters.
*Verify code:
?
?
Webinars

Seminars

Visit Asia Webinars to learn about the latest in technology and get practical design tips.

?
?
Back to Top