Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > EDA/IP

Micron adopts Synopsys SiVL DFM for 90nm production

Posted: 19 Nov 2004 ?? ?Print Version ?Bookmark and Share

Keywords:micron technology? synopsys? sivl? silicon-versus-layout software? dram?

Micron Technology Inc. has chosen Synopsys Inc.'s SiVL silicon-versus-layout software to help implement its advanced DRAMs, flash memories, cmos image sensors, and other semiconductor components. Micron says it has selected the SiVL software, a key component of Synopsys' comprehensive DFM solution that addresses manufacturability and yield issues of complex IC designs, because of its ability to catch critical lithography errors prior to tapeout improving manufacturing efficiency at advanced technology nodes such as 90nm and below.

The SiVL tool's check-figure capability identifies the critical features most likely to have errors and then applies simulation-based lithography rule checks (LRC) to find them. It also performs pattern-based checks, such as mask rule checks (MRC), to improve mask manufacturability. The SiVL tool achieves fast turnaround time through its distributed processing capability that has been proven scalable on standard, widely available low cost compute platforms.

"The rapidly expanding use of RET in the 90nm and 65nm nodes dramatically increases the chances of killer lithography-related defects going undetected. The SiVL software helps finds these defects thereby preventing costly time-to-market delays and enabling RET closure," said Tom Kingsley, product marketing manager for lithography verification at Synopsys.

Article Comments - Micron adopts Synopsys SiVL DFM for ...
*? You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.

Back to Top