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TI enables upgrades without backplane redesigning

Posted: 22 Nov 2004 ?? ?Print Version ?Bookmark and Share

Keywords:texas instruments? ti? data buffer? signal conditioner? multiplexer?

Texas Instruments Inc. introduced what it claims as the industry's first 0Gbps to 4Gbps data buffer/signal conditioner with a dual multiplexer.

According to TI, its SN65LVCP40 enables designers of communications systems to upgrade 1Gbps systems to 4Gbps without redesigning their backplanes. The device supports high-speed networking standards such as XAUI, Gigabit Ethernet, Fiber Channel and InfiniBand and can also be applied as a link replicator or data redundancy switch in backplanes.

The new product provides four selectable levels of output pre-emphasis on the drivers so that the designer can optimize performance to particular trace or cable lengths. Receiver equalization on the inputs reduces jitter, which is measured at 90ps at input, to as low as 30ps at output. As a result, the company said, the equalizer compensates for intersymbol interference (ISI) effects inherent in transmission of data over longer distances. The equalization is optimized to compensate for a FR-4 backplane trace with 5dB, high-frequency loss between 375MHz and 1.875MHz, which corresponds to a 20-inch long FR-4 trace with 8-mil trace width.

The LVCP40 combines a pair of 1:2 buffers with a pair of 2:1 serial multiplexers (mux) and incorporates a selectable switch-side loopback that supports system testing. Each of the two independent channels consists of a transmitter with a fan-out of two and a receiver with a 2:1 input multiplexer. The multiplexers can be configured to handle system redundancy requirements from the line card to the controller card, and can also be configured to provide a loopback function through the device for either device-level or system-level testing.

"Until now, communicating at multi-gigabit speeds over backplanes has meant a substantial investment in specialized transmission media," commented Art George, VP and manager of TI's high-performance linear business. "Using the capabilities of TI's BiCom-III process, the LVCP40 is now able to open the data 'eye' at industry-leading low power, allowing designers to improve performance and save cost and time-to-market by quickly upgrading their systems to 4Gbps, while leaving in place their 1Gbps backplanes."

The BiCom-III SiGe process

The BiCom-III SiGe process is said to be the first to integrate complementary NPN and PNP bipolar transistors in a SiGe process. The complementary bipolar transistors enable many high-performance analog and mixed-signal products, increasing speed up to 3X while reducing noise by as much as one half. The BiCom-III affords the LVCP40 fast edge rates of 80ps at low power consumption of only 330mW/channel (typ) or 440mW/channel (max), and enables excellent electromagnetic isolation between channels to minimize crosstalk, TI said.

Other features of the SN65LVCP40 include driver pre-emphasis (0-, 3-, 6-, 9dB); high channel-to-channel noise isolation; 1,200mV output swing; and a 100-ohm internal receiver termination with self-biasing and oddcommon-mode noise termination.

The SN65LVCP40 is housed in a 48-pin QFN lead-free package, with a suggested resale pricing of $17.40 each in 1,000-piece quantities. Samples are available for 24-hour delivery.

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