Deep-submicron CMOS aids RF design

While shrinking CMOS lithographies pose many difficult challenges for analog circuits, including shrinking supply voltages and increasing leakage currents, they also offer some advantages that analog and mixed-signal circuits can exploit with the right architecture and circuit approach. For example, deep-submicron CMOS transistors are achieving high fTs that are being exploited in RF circuits, from cellphones to WLANs. With the RF circuitry realized in BiCMOS or CMOS, designers are reexamining the partitioning of communication systems. A new generation of "bits out" radios that features analog and RF functions with a high level of digital integration is emerging.

Traditional wireless-system partitioning has separated each of the RF, analog baseband and digital modem functions into their own chips. The receive and transmit functions of the radio may be further separated, with yet another separate device for the transmit power amplifier. Historically, this separation was necessary because each of those functions was realized with a different process technology. Over time, more of that functionality became practical in CMOS technologies, and has become more integrated--particularly for applications where the radio performance is less demanding, like Bluetooth or WLAN. In some cases, the analog baseband functions were integrated with the digital modem functions. That allowed a fairly simple, low-pin-count analog interface between the radio and baseband modem chips, and is still the most common partitioning today for many integrated wireless systems.

Partitioning challenges

One difficulty with traditional partitioning is that in addition to the main analog signals passing between the two chips, many modern systems have some sophisticated control algorithms, such as gain control, frequency correction and filter tuning, that involve interaction between the radio and the digital modem functions. Those functions require additional lines between the baseband and RF chips, and while a few extra lines in and of themselves do not add significant cost, it can be difficult to standardize those control functions.

Consider a generic radio transceiver block diagram for a typical wireless system. Key blocks include gain control for the receive and transmit path, and channel filtering for both the analog and digital domains. The key functions in the radio receive path are amplification of the desired signal and filtering/rejection of unwanted signals. The combination of those two functions optimizes the ability to recover weak signals in the presence of strong interferers.

Filter tips

In general, it is desirable to apply the strongest gain possible without overloading the signal-processing blocks (whether analog or digital). In a sophisticated receiver, there may be multiple gain control loops that cross the analog/digital boundary. An additional challenge is that signal strength has to be detected on both sides of the filters. If an interferer is suppressed by the first filter, however, it is invisible to the subsequent stages. Yet if the gain is set too high in the LNA, that interferer could saturate the filter. Situations like this call for gain control algorithms that are very specific to an individual radio design.

The filters themselves are another example of functions that cross the analog and digital boundary in radio design. The more dynamic range the ADC and DAC have, the more the filtering can be moved into the digital domain for easier programmability.

Conventional partitioning puts analog filters on one chip and the converter and digital filters on another. This inhibits design trade-offs with respect to analog filtering, digital filtering and converter dynamic range. To realize best performance at low cost and power consumption, it is important to optimize these blocks.

In an effort to make the radio more complete, designers have been exploring system repartitioning to bring more of the modem control functionality onto the radio chip. This allows many of the critical functions like AGC to be self-contained. A significant disadvantage of this partitioning in high-bandwidth, high-dynamic-range systems is that the radio modem interface switches from A/D, potentially increasing the pin count and cost of both parts, since high dynamic range implies a higher number of bits in the ADC, and high bandwidth implies high sampling rates. This leads to the cost and power problems associated with high-speed parallel buses.

This is where one of the other advantages of deep-submicron CMOS has been proposed to solve the problem. Rather than a high-pin-count parallel digital interface, the interface between radio and modem chips can be implemented in a low-pin-count, very high-speed serial low-voltage differential-signaling interface.

Realization of chip-to-chip interfaces running at 1Gbps or greater is fairly straightforward in modern CMOS technologies. This allows a digital radio partitioning to realize a more complete, standalone radio functionality that offers the potential to make interoperability between radios and baseband chips for high-data-rate systems from different vendors much more straightforward. In the 802.11 WLAN world, a working group has even published a standard format for this interface.

High-speed serial digital interfaces are being exploited to change the way systems are partitioned. In some cases, these interfaces will be proprietary links optimizing communication across a chip set pair. In other cases, these interfaces may become standardized. Both situations tend to bring more digital control circuitry onto the radio chip, leading to more digitally integrated RF.

- Dave Robertson

Product Line Director

Analog Devices Inc.