Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
?
EE Times-Asia > Amplifiers/Converters
?
?
Amplifiers/Converters??

Trouble spinning in analog ICs

Posted: 01 Dec 2004 ?? ?Print Version ?Bookmark and Share

Keywords:analog? digital? rf? transceiver? oem?

Subramanian: It might sound contradictory, but digitizing real-world signals requires lots of analog chips.

During the last five years, we have witnessed a triumph of analog chips because of the exponential growth in the number of products that contain RF and high-speed analog technologieslike wireless devices, networking transceivers, digital cameraswhere real-world analog signals are converted to digital formats for storage and processing.

A big reason for the increase in the number of products that contain this analog content has to do with the fact that the end-product features made possible by these analog technologies (often involving digital processing) enable strong OEM product differentiation, and command high margins in the semiconductor market. It might sound contradictory, but digitizing real-world signals requires lots of analog chips. And more end markets are appearing for analog chips, with the rate of new-product introductions in the analog/RF chip space doubling every year since 1997, according to IC DataBean.

The vertical markets for these RF and high-speed analog products are growing rapidly. The Semiconductor Industry Association, in its latest World Semiconductor Forecast of June 2004, noted a historic shift that has occurred in the semiconductor business. This marks the first year in the history of the semiconductor business that analog chip sales will overtake the microprocessor category. Between 2003 and 2007, analog-chip sales growth is expected to soundly beat the overall pace for the chip industry.

Because hypercompetition is the rule in these large, vertical semiconductor markets, companies are facing incredible pressures to cost-reduce and introduce differentiated products as fast as possible. This translates into delivering highly integrated, complex chips that meet aggressive specifications and cost targets on time, with very tight schedules.

"Impossible" is a word often heard among high-speed analog and RF circuit design teams that are trying to squeeze unprecedented levels of functionality onto a single device. And chip suppliers must aggressively race to meet shrinking market windows. It becomes imperative for designers to beat the competitionand that means focusing all efforts on quickly capturing profits and winning market share with the tools at hand.

The tools at hand, however, are not up to the task. The inability of analog chip designers to accurately characterize the performance and behavior of these complex circuits prior to tapeout is a major obstacle to beating the competition. With existing design methods and analysis tools (which were created when analog chips were far less complex), designers must deal with larger circuits that often cannot be analyzed in their entirety. Very often, the inaccurate approximation methods used in existing analysis tools result in missing real-world effects, leading to design respins.

In many cases, the lack of proper analysis capabilities required to characterize specific parameters forces designers to plan for multiple respins. Today's designers are resigned to the likelihood of having to go through three to five silicon respins before they get their design ready for volume production. All of this translates into missed market windows and missed cost targets. This is simply unacceptable.

The only way to successfully design such complex analog circuits on time, on spec and on cost target is to eliminate the threats to achieving market success. This begins with eliminating the inability to fully characterize a design before committing to silicon. This requires that the design methodologies and tools evolve to deliver the innovations that allow large circuits to be analyzed accurately using new theories that apply non-linear, stochastic numerical techniques to circuit analysis.

Providing a silicon-accurate view of behavior and performance even before silicon has appeared should be a cardinal goal. Without this, market success will continue to depend on the unpredictable nature of design cycles wrought with respins.

- Ravi Subramanian
President and CEO
Berkeley Design Automation




Article Comments - Trouble spinning in analog ICs
Comments:??
*? You can enter [0] more charecters.
*Verify code:
?
?
Webinars

Seminars

Visit Asia Webinars to learn about the latest in technology and get practical design tips.

?
?
Back to Top