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Agere utilizes Verisity verification process automation

Posted: 10 Dec 2004 ?? ?Print Version ?Bookmark and Share

Keywords:agere systems? verisity? et1310? pci express gigabit ethernet controller?

Agere Systems has used Verisity Ltd's verification process automation VPA products for a string of tape-outs including the ET1310 PCI Express Gigabit Ethernet controller.

Agere has utilized Verisity products for several years now because the solutions address the entire chip design verification process. "On the ET1310 project, using the automatic stimulus generation and assertion checking capabilities allowed us to specify some very hard-to-create corner cases and verify in our functional coverage report that we covered them with significantly less effort in test case generation," said Don Friedberg, director of design methodologies at Agere.

The Agere verification team also employs eVerification Components (eVC), Verisity's reusable verification environments to integrate automatic stimulus generation, assertion checking, and functional coverage analysis. "The ET1310 project reused and enhanced an eVC developed for a previous project and it has subsequently been adopted by two additional projects. This has reduced the effort of verification environment creation and debug for three projects," stated Friedberg.

Agere will also utilize vManager, another component of VPA solutions. vManager simplifies the complete verification process by automating the many tasks that once required intensive human interaction and custom development. vManager provides predictability and optimization of resources by capturing an executable specification and providing a clear view of verification status through total coverage measurement.





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