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Synopsys, ARM partner on VIP suite for AMBA 3 AXI protocol

Posted: 13 Dec 2004 ?? ?Print Version ?Bookmark and Share

Keywords:synopsys? verification intellectual property suite? vip suite? amba 3 axi protocol? designware?

Synopsys Inc. disclosed that it has released the industry's first verification intellectual property (VIP) suite for the AMBA 3 AXI protocol.

The DesignWare VIP for the AMBA 3 AXI protocol, created through the collaboration of Synopsys and arm, builds on the acceptance of the AMBA AHB interface.

The AMBA 3 AXI protocol is the next-generation of the AMBA family of on-chip interface protocols, targeted at high-performance, low latency designs and is supported natively by new ARM embedded processors, including the ARM1176JZ-S processor, the ARM1156T2F-S processor and future Cortex family processors.

According to the press release, the DesignWare VIP for AMBA 3 AXI protocol embodies extensive protocol expertise and provides stimulus generation, response creation and bus interface protocol checking, required for successful SoC verification. The new VIP can save designers 75 percent or more in testbench development time and effort by enabling the use of a layered, coverage-driven, constrained random verification environment, said Synopsys. Individual tests, various arbitration schemes and multiple component interactions can all be tested early in the design process.

"High quality VIP is an essential element for the successful development of complex SoC designs based around high-performance ARM11 family processors that use AMBA 3 interfaces," commented John Cornish, director of Product Marketing at ARM. "The launch of Synopsys' DesignWare VIP for the AMBA 3 AXI protocol highlights the increasingly wide adoption of interfaces from the AMBA 3 protocol family."

Guri Stark, VP of Marketing in the Solutions Group at Synopsys, added, "The availability of the VIP for AMBA 3 AXI protocol in DesignWare Libraries should help speed the development of the next generation of high-performance designs."

VIP's four components

There are four components of the DesignWare VIP for AMBA 3 AXI protocol: configurable interconnect, master, slave and monitor models. The interconnect VIP allows the verification of design blocks to start before the actual interconnect RTL is available. Within a dynamic simulation, the designer uses the master and slave VIP components to generate transactions and responses. In addition to bus protocol checking, the VIP monitor automatically collects transaction coverage data and provides advanced debugging hooks for the testbench environment. There is also built-in support for coverage-driven constrained-random test generation through a reusable, layered verification approach.

The DesignWare VIP for AMBA 3 AXI protocol is already available and is included in the DesignWare Library and the DesignWare Verification Library for no additional cost to existing licensees. The DesignWare Library and the DesignWare Verification Library (a subset of the DesignWare Library) are available on a subscription or perpetual license basis.

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