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FPGAs/PLDs??

FPGAs take centerstage

Posted: 06 Jan 2005 ?? ?Print Version ?Bookmark and Share

Keywords:fpga? asic? assp? ic? design?

Loftus: Asia-Pacific will remain to be the growth engine for the semiconductor industry in 2005 and beyond.

Asia-Pacific will remain to be the growth engine for the semiconductor industry in 2005 and beyond. In large economies like China and India, domestic demand for electronics is fueling the growth of local IC design work; while other Asian countries are successfully exporting their locally-designed products worldwide. In addition, many international tech players are already outsourcing their manufacturing activities to Asian design houses. From telecoms infrastructure equipment to digital consumer products, Asian-developed electronics designs are increasingly setting global standards in innovation and market success.

Since the Asia-Pacific region is the world's electronics manufacturing base, Asian engineers have an advantage to be one of the first to be exposed to the latest semiconductor trends. One such trend is the decreasing number of ASIC design starts and a subsequent increase in FPGA design.

The evolution of the FPGA will take a big step forward in 2005. A new breed of domain-optimized platform FPGAs that promise multidimensional application scaling based on required features and cost goals will be available in high volume early this year. Thanks to a columnar architectural approach, platform FPGA devices with different combinations of feature sets can now cost-effectively be developed. This means a platform FPGA device can be optimized for a certain domain of applications, such as logic, DSP, connectivity and embedded processing, to meet application requirements previously delivered only by ASICs, ASSPs and similar technologies, while retaining programmability.

Asia-Pacific has thrived as a source of cost-effective electronics manufacturing by pursuing advances in process technology. Today, it is possible to combine the use of industry-leading 90nm silicon fabrication technology with 300mm wafers, resulting in a cumulative effect of increasing the number of die per wafer five times over previous-generation devices. Increasing the die per wafer and enabling architectural integration equates to a substantially lower system cost. In the latter half of 2005, designers can look forward to even more cost-savings due to the ramping up of bleeding-edge 65nm manufacturing technology.

As a major provider of programmable logic solutions, Xilinx believes 2005 will be an exciting year for our Asia-Pacific customers. Xilinx has shipped over 1 million 90nm Spartan-3 devices, while Virtex-4 is our second 90nm product line in volume production. Our commitment to process technology leadership, from 90nm to 65nm and beyond, enables our customers to be among the first to build next-generation systems at lower costs.

- David Loftus
VP for Asia-Pacific
Xilinx Inc.




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