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Philips Semi pushes ARM outside MCU envelope

Posted: 17 Jan 2005 ?? ?Print Version ?Bookmark and Share

Keywords:migration? microcontroller? 32bit? memory? i/o?

Two trends are converging on the 32bit microcontroller (mcu) segment, accelerating the growth of CPU power, memory size and I/O sophistication.

The first is the wholesale migration of industrial, medical and similar applications to 32bits, larger code sets and more computing demands. Increasingly, designers are taking advantage of the ability to do it in software alone. Then they find that the software will need more horsepower.

The other trend is coming from the shambles that was the middle of the ASIC market. Battered by economic factors and deeply constrained by the fragmentation and consumerization of end markets, where a runaway success may only last six months and where margins are microscopic, many design teams are looking hard at whether one of the powerful 32bit MCUs coming onto the market could do the job.

These forces are reflected in a new line of arm-based flash microcontrollers just introduced by Philips Semiconductors. "This is the third wave of features in our 32bit ARM family," said Joe Yu, strategic marketing manager at Philips.

Yu said the needs of Philips' MCU customers increasingly resemble those of the board-level embedded-computing market, rather than those common in the old, simple 8bit MCU days. "Designers say they want deterministic performance for real-time tasks," Yu said. "They're also concerned about having a sufficiently sophisticated interrupt controller to work with a commercial rtos. They want the kind of computing power and memory space they could get in 32bit microprocessors, and they are saying that they want real-time debugging support, not just hardware breakpoints."

"And of course they want all this in a single-chip configuration for an 8bit price," he added.

With its new line, Philips has tried to provide just that. Philips is using its ARM 7TDMI-S CPU operating at up to 60MHz. Because the chip is designed to execute code directly from the flash array, there is a 128bit path from the flash memory to the fetch unit. This, combined with a programmable memory bus clock that allows software to regulate the speed of flash accesses, gives the chip up to 57MIPS of raw performance at 60MHz, but with data sheet supply current of only 50mA at that speed.

Unlike many competitors, Philips chose to include the ARM real-time debug module in the core, permitting users to run traces and snapshots of the CPU state without halting execution of the foreground program, according to director of product innovation Ata Khan. This becomes useful, for example, when the foreground program is performing an interactive measurement, controlling fluid flow or the motion of a large machine.

Philips has also put its largest flash array yet on this branch of the familyup to 512KB in the LPC2138, coupled in that case with 32KB of SRAM. This move required some additional engineering.

"We use a two-transistor flash cell that is larger than other embedded flash cells but is also extremely resistant to write-disturb," Khan said. "On top of that, as memory arrays get larger and environments more harsh, we have to deal with overall reliability. So we are using an 8bit per 128 data bits error-correcting code in the flash array, which reduces read errors by orders of magnitude."

The digital I/O has also come in for some scrutiny in response to user needs, Yu said: "Particularly from server makers that use MCUs for system monitoring and control, we heard the need for multiple I?C ports. And in other applications, there is a need for very fast serial I/O. To address that, we added what Philips calls an SSP port. It operates at up to 30MHz; is compatible with Freescale's SPI, TI's SSI and National's Microwire; and can also be configured to add more I?C capacity."

Further, the designers modified the way the controller interacts with the programmable I/O pins, providing both an atomic bit-set/clear capabilityso that an interrupt can't interfere with the checking and setting of an external control registerand a 32bit port write, so that arbitrary patterns can be written into a series of bits simultaneously.

It has also not escaped the notice of the Philips designers that increasingly 32bit MCUs are being used alongside FPGAs, in many cases filling the role of ASIC alternatives. Right now, according to Khan, most users link the MCU and FPGA via the microcontroller's external memory bus, memory mapping a set of registers on the FPGA. In the future, more-sophisticated schemes involving either very fast serial I/O or more sophisticated parallel connections may link the two chips' states.

Khan speculated that as MCU-plus-FPGA combinations become more common, there will be increasing pressure for a single debug environment that spans the software, MCU peripherals and FPGA logic. "Linking the MCU and ASIC development environments may be one of the big issues holding back a mass migration from ASICs to advanced microcontrollers," he said.

Most of the design work seems to have gone into the analog side of the MCU line. Philips has added dual 10bit, 400Ksample ADCs and a 10bit resistor-string DAC to the product. This should meet the majority of data conversion needs for designs, Yu said, including those that need to make quadrature measurements without a time lag between the two samples that make up a data point.

Further, the analog folks provided a brownout detect and power-on reset capability on the chip, and they were able to generate enough internal voltages that the chip requires only a single 3V supply, rather than separate core and I/O supplies.

Beyond increased performance and added features, advancing technology brings another benefit: lower cost. Philips plans to have the smallest member of the new line available for $3 each in large quantities. So within limits, users are getting what they want: 32bit performance, substantial memory size and a full-bodied peripheral set at something approaching an 8bit price.

- Ron Wilson

EE Times

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