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Cadence releases design constraint checker

Posted: 20 Jan 2005 ?? ?Print Version ?Bookmark and Share

Keywords:cadence design system? analysis tool? synopsys design constraint? sdc?

Cadence Design System Inc. has released a new formal analysis tool that generates, analyzes and validates the quality of design constraints designers use to run synthesis, timing analysis and place-and-route tools.

Traditionally, users manually create design constraints in the de facto standard Synopsys Design Constraint (SDC) format, enter them into their tools, run the tools and then generate a list of design constraint violations. But Ramesh Dewange, senior product marketing manager at Cadence, said that as IC designs become more complex, so too do the constraints needed to run synthesis, timing and place-and-route tools. This complexity said Dewange requires users check not only their HDL and layouts for errors but also their constraints.

"Conformal Constraint Designer is a product to ensure a valid timing constraint for a given design problem," said Dewange. "It helps in rapid timing closure and help users pinpoint errors in design constraints."

Dewange said the new Conformal Constraint Designer was under development at formal verification vendor Verplex when Cadence acquired that company in July of 2003.

The tool uses a formal engine to generate, analyze and validate SDC files. "The formal engine helps prove functionally whether or not constraints are correct," said Dewange. "For example, if you have a false path exception in the constraints, the tool can determine if a design is synthesizable or not by looking at all possible combinations that could jeopardize the path," said Dewange. "This technology is the same that is used in equivalence checking so we extended the capability into the constraint domain."

Dewange said the tool was designed to be used in conjunction with Cadence or third party synthesis, static timing and place and route tools.

The tool reads RTL and gate level netlists, SDC and optionally critical path lists from static timers and layout tools. The tool outputs SDC annotated with errors and views for waveform and schematic tools.

Conformal Constraint Designer starts at $80,000 for an annual subscription.

- Mike Santarini

EE Times




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