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Cadence RTL compiler supports Sanyo production designs

Posted: 28 Jan 2005 ?? ?Print Version ?Bookmark and Share

Keywords:sanyo electric? digital ic design platform? rtl compiler synthesis? asic chip? digital consumer product?

Cadence Design Systems Inc. revealed that Sanyo Electric Co. Ltd has achieved an important production tapeout with the Cadence Encounter digital IC design platform, including RTL compiler synthesis. Sanyo applied the Encounter RTL compiler to a design-critical block for high-end graphics processing; and was then integrated into an ASIC chip at the heart of Sanyo's digital consumer product.

"We chose Encounter RTL compiler to tape out this important new chip because it provided us with better area and power that couldn't be attained using our previous synthesis solution," said Hideki Yamauchi, materials and devices development center BU, Sanyo.

Sanyo says the Encounter RTL compiler helped decrease power consumption of an important block of the company's chip by 10 percent, while maintaining critical performance requirements. RTL compiler was able to shrink the chip's area over the size achieved by competitive solutions, Sanyo added.





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