Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > Processors/DSPs

TI to begin sampling initial 65nm DSP devices

Posted: 15 Feb 2005 ?? ?Print Version ?Bookmark and Share

Keywords:65nm? dsp? cell phone?

At the International Solid State Circuits Conference (ISSCC) here, Texas Instruments Inc. disclosed that it will shortly begin sampling its first 65nm devices amid an aggressive ramp on the 90nm front.

The company's first 65nm part is a "DSP (digital signal processor) for cell phones," said Dennis Buss, vice president of silicon technology development at TI (Dallas).

The DSP will begin sampling this quarter, according to TI. For some time, the company said it plans to move its 65nm process into production in the first part of 2006.

With its aggressive ramp, TI hopes to stay one step ahead of its competitors in DSPs and other chip markets. The company continues to lead the DSP market, with shipment growth that increased their market share to 49.7 percent in 2004, according to market research firm Forward Concepts Co.

TI was the leader in DSPs in 2004, followed by Freescale (12.9 percent), Agere Systems (9.8 percent), Analog Devices (7.7 percent) and Philips (6.8 percent), according to Forward Concepts. The DSP chip market increased by 27.2 percent compared with 2003, to reach a value of $7.8 billion last year, according to the firm.

TI is also aggressively ramping up its 90nm designs. And at ISSC, the company described several breakthroughs on the 90nm front. For example, TI described an all-digital phase-lock-loop (PLL) and GSM/Edge transmitter, based on a 90nm CMOS process. At 6dBm output power, the transmitter draws 42mA from a 1.2V supply.

The company also presented a paper on a single-chip GPS receiver, based on a 90nm, CMOS process. Housed in a 5mm-by-5mm chip-scale package, the GPS receiver is aimed for GSM and CDMA handsets.

Working in the GPS L-1 band at 1575.42MHz, the receiver supports an intermediate frequency (IF) of 4.092MHz, with a 5dBm out-of-band IIP3 noise figure (NF) of 2.0dB. The receiver consists of a low-IF RF-front-end mix, which itself incorporates a low-noise amplifier, image rejection unit using IQ mixers and passive poly-phase filter and a synthesizer.

- Mark LaPedus

Silicon Strategies

Article Comments - TI to begin sampling initial 65nm DS...
*? You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.

Back to Top