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Atmel, Celoxica co-develop ESL design for latest processors

Posted: 08 Mar 2005 ?? ?Print Version ?Bookmark and Share

Keywords:celoxica? electronic system level? esl? processor?

Atmel Corp. and Celoxica Ltd have cooperated to extend electronic system level (ESL) design to a family of dynamically reconfigurable processors currently under development at Atmel. The new backend tools are being developed for a new generation of processors based on Atmel's FPSLIC technology that is planned for introduction later this year.

Tools from Celoxica's ESL portfolio, the DK Design Suite and Agility Compiler will synthesize hardware accelerators from highly complex algorithms described in C or SystemC. Celoxica will also provide its HW/SW co-design technology and board-level integration technology to offer Atmel customers a seamless implementation flow.

Guy Lafayette, marketing manager at Atmel, said, "By using design tools from Celoxica we can easily migrate to ESL and enable our customers to better explore the design space, evaluate partitioning trade-offs and efficiently map complex designs onto a device."

Jeff Jussel, VP of marketing for Celoxica, added, "ESL design coupled with high-level synthesis delivers the productivity and efficiency gains that designers and modern reconfigurable architectures demand. By working with Atmel, we will extend design support to include not only high speed, high quality custom HW/SW implementations but also pre-compiled IP that further reduces the burden of complex design and verification."





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