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Memory/Storage??

Hope floats for new DRAM

Posted: 16 Mar 2005 ?? ?Print Version ?Bookmark and Share

Keywords:dram? z-ram? silicon-on-insulator? mosfet? soi?

A potentially revolutionary 90nm DRAM technology, claiming gains in speed, size and power consumption, has been developed by a Swiss startup.

Innovative Silicon Inc. said the working cells of its Z-RAM design need half the area of a conventional DRAM cell, run faster and demand less power. Still, questions remain about the technology, its patent situation and its ability to compete in the notoriously unrewarding embedded-DRAM market.

Innovative's DRAM cell stores information not as charge in a storage capacitor but as trapped charge beneath the channel of a conventional SOI MOSFET. This charge, which gives rise to the floating-body effect, has been variously cited as both the largest problem in SOI design and the source of SOI's potential for high-speed switching. But it has never before been used commercially as a storage medium.

That is not to say the idea is new. A researcher at the Interuniversity Microelectronics Center (IMEC) obtained the original patent on using the floating-body effect in a dynamic memory in 1990, said Mark-Eric Jones, Innovative Silicon's president and CEO. Ultimately, however, IMEC decided the idea was not feasible and abandoned it. "They let the patent lapse," he said.

But not everyone lost interest. Pierre Fazan, co-founder and chief technology officer of CTO of Innovative, was one of those who picked it up and tried new angles. Fazan first described a conceptual DRAM cell based on the principles in a paper in 2001. Venture-funded Innovative was officially founded the next year. At the same time, researchers in other companies took notice. Papers have come from Japanese semiconductor companies and IBM has been examining it, too.

The Innovative cell is elegant in its simplicity. A single transistor lies with its source on a select line and its drain on a bit line, with the gate connected to a word line. When sufficient drain voltage is applied, the amount of source current depends on the amount of charge stored in the floating body of the transistor. If holes have become trapped under the active region, the current will rapidly become relatively high. If electrons are trapped there, the current will increase more gradually with voltage to a lower maximum.

Other issues must be dealt with as well. One is that even trapped charge is not forever. The cell can be written by injecting charge into the floating body of its transistor, either through hot-electron ionization or through band-to-band tunneling. The former technique is fastest, and the latter takes much less power, giving Innovative both high-speed and low-power versions of the technology more or less for free. The problem is that the charge gradually dissipates, mainly through recombination, so the memory cell must be refreshed. Fortunately, Fazan said, at operating temperatures the retention time of the cell is similar to that of conventional DRAM, so the refresh rates can be about the same.

'Potential concerns'

"This is a technology that is certainly worth looking at," said Jack Mandelman, semiconductor technology analyst at IBM, and a father of the IBM/Toshiba/Siemens DRAM technology. "But there are many potential concerns, among them timing issues and interactions with adjacent cells."

But the advantages are compelling. Take density and performance. Innovative said it has in-hand 90nm silicon with read-and-write times under 3ns, and a bit-cell design with an area of 0.18?m?. Megabit-sized arrays in 90nm are now being fabricated.

Another substantial advantage is that the memory is built in a stock SOI cmos logic process. With no differences in junction grading and no self-aligned contacts, Z-RAM can be used in embedded memory arrays with no changes to the standard logic process if the design is using SOI.

For now, Innovative plans to pursue the embedded-DRAM market with a pure-play intellectual-property business model. It will license hard IP on a per-instance basis, or will license the underlying technology and provide training for customers who want to do their own memory designs. And the company is working on a memory compiler that will also be licensed to customers.

The embedded-DRAM market resembles a graveyard of startupsand some quite large company effortsthat proved to be technically messy or economically uncompetitive. Possibly, the only company currently pleased in the field is NEC Corp. Philip LoPresti, associate VP and GM of the Custom LSI division at NEC, said that the company has been seeing considerable interest in its metal-insulator-metal capacitor embedded-DRAM process, particularly at 90nm.

In addition, the amount of memory that can be placed on a die at 90nm takes embedded DRAM well beyond the handful of frame buffer or scratch pad applications found in previous generations. Innovative's Jones expects that this will also be a major factor in the company's case. With the small cell and higher speed relative to other DRAM, "we aren't just looking at application-specific buffers any more," Jones said. "This DRAM is fast enough and dense enough to serve as L2 cache on an ARM-class processor, or L3 cache on a high-end workstation CPU, but with far lower power and much greater density than could be achieved with SRAM."

The prospects are fascinating, but the picture is not all roses. For one, the floating-body effect is only important in SOI, automatically limiting Innovative's available market. So far, only a handful of production chips are in advanced SOI processes: an IBM Power CPU, a CPU line from Advanced Micro Devices and a chip Sony and Toshiba are developing for the next-generation Playstation. None was done as a conventional ASIC design and each represented a huge effort by the design team involved.

Another issue for Innovative to deal with will be IBM's patent juggernaut. "Since the original paper by Fazan, there has been a lot of work," IBM's Mandelman said. "Toshiba has published describing a similar cell. And we are involved in developing IP to address some of the concerns with the original work."

- Ron Wilson

EE Times




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