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Virtex-4 FPGAs boast lower power

Posted: 31 Mar 2005 ?? ?Print Version ?Bookmark and Share

Keywords:xilinx? web power tool? fpga? virtex-4?

Xilinx Inc. has raised the performance benchmark again by claiming that v4.1 of its Web Power Tool provides 1W to 5W lower power per FPGA in its Virtex-4 family.

"Using real-world hardware measurements at realistic junction temperatures in the lab, we compared our devices head-to-head with competitive 90nm devices," said Andy DeBaets, senior director of systems and application engineering of the Advanced Product Division at Xilinx. "Despite competitors' attempts to overcome their power consumption disadvantage by presenting revised data, Virtex-4 devices demonstrate indisputable 1W to 5W lower power," DeBaets added.

The company cited its 90nm triple-oxide technology, embedded IP and power-saving configuration circuitry to its 'lead' in low-power consumption. The total power reduction per FPGA is derived from up to 73 percent lower static power and up to 86 percent lower dynamic power.

"Power consumption has become as increasingly important consideration in a very wide range of applications," said Jordan Selburn, principal analyst at iSuppli Corp. "Excess power impacts system costs through more expensive packaging requirements, fans, heat sinks, etc."

The Virtex-4 Web Power Tool v4.1 has been enhanced with power estimation for the hard-IP FIFO capability, and provides power data for embedded PowerPC processors and RocketIO multi-gigabit transceivers. Users can now also override default Theta-JA values and estimate power consumption using their specific heat-sink characteristics. The Web Power Tool v4.1 is available now at no cost.

- Ismini Scouras


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