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Smallest, lowest power' ADCs

Posted: 12 Apr 2005 ?? ?Print Version ?Bookmark and Share

Keywords:texas instruments? ti? analog-to-digital converter? adc? burr-brown?

Extending its portfolio of delta-sigma data converters, Texas Instruments Inc. (TI) recently introduced a pair of high-speed, high-precision analog-to-digital converters (ADCs) from its Burr-Brown product line.

Designed for very linear high-speed operation, the ads1601 and ads1602 are ideal for demanding measurement applications in scientific instrumentation, automated test equipment, data acquisition, medical imaging and vibration analysis, said the company.

The ADS1602 modulator samples input signals with a 40MHz clock, while the digital filter decimates the modulator output by 16 to provide high resolution 16bit output data at 2.5MS/s over a serial interface. TI added that dynamic performance is excellent all the way up to the 1.23MHz passband transition. THD is less than -101dB, SFDR is greater than 103dB, while SNR is greater than 91dB.

The ADS1601 has the same advanced architecture and is optimized for applications requiring less aggressive data rates and lower power dissipation. It features 1.25MSPS data rate, 330mW power dissipation, 92dB SNR, -103dB THD and 105dB SFDR. This product is pin-compatible with the ADS1602.

"Both the easy-to-use ADS1601 and ADS1602 provide superior performance compared to competitive 16bit devices and allow customers to easily upgrade the performance of their designs," commented David Russell, strategic marketing engineer for TI's oversampling data converter products. "The devices also represent the smallest, lowest power solutions within this performance segment."

Oversampling topology

The two new ADCs utilize oversampling topology which reduces clock jitter sensitivity during the sampling of high-frequency, large amplitude signals by a factor of four over that achieved by Nyquist-rate ADCs. A full-scale 3V differential input range makes out-of-range signals unlikely. The on-chip decimation filter stop band extends to 38.6MHz (ADS1601 = 19.3MHz), which simplifies the anti-aliasing circuitry. The modulator samples the input signal up to 40MS/s (ADS1601 = 20MS/s) while the 16x decimation filter uses a series of half-band FIR filter stages to provide 75dB stop band attenuation and 0.001dB of passband ripple.

Output data is provided over a simple 3-wire serial interface, with a -3dB bandwidth of 1.23MHz (ADS1601 = 615kHz). The output data or its complementary format directly connects to DSPs, such as the company's TMS320 family, as well as FPGAs or ASICs. A dedicated synchronization pin enables simultaneous sampling with multiple ADS1601s or ADS1602s in multi-channel systems.

Power dissipation is set by an external resistor and can be reduced when operating at slower speeds. The devices operate from a 5V analog supply and a 3V digital supply. The digital I/O supply operates from 2.7V to 5.25V, enabling the digital interface to support a range of logic families. All features are controlled by dedicated I/O pins.

The ADS1601 and ADS1602 are packaged in a 7-by-7mm TQFP-48 and are priced at $14 and $23 in 1,000-piece quantities, respectively. Evaluation modules for both devices are also available.

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