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Freescale, Soitec claim 45nm designs with strained SOI

Posted: 14 Apr 2005 ?? ?Print Version ?Bookmark and Share

Keywords:soitec? 45nm cmos devices? soi substrates?

A collaborative effort between Freescale Semiconductor Inc. and Soitec Group has resulted in the ability to build 45nm CMOS devices using strained silicon-on-insulator (SOI) substrates, the companies claimed.

By combining Soitec's Smart Cut SOI technology and Freescale's advanced CMOS process capabilities, the development team was able to produce the industry's first functional 45nm CMOS devices on bonded strained SOI substrates.

sSOI is a strong candidate for the sub-65nm technology nodes due to its unique ability to address high-performance, low-power-consumption applications.

"With device results revealing an approximate 70 percent increase in electron mobility, as well as high compatibility with existing SOI CMOS processes, the collaborative effort demonstrated that 45nm CMOS devices built using strained SOI substrates can effectively take device performance to the next level," according to the companies.

The initial work performed was based on silicon germanium-on-insulator, followed by sSOI, allowing both Soitec and Freescale to learn how to match a strained SOI substrate with a device design to optimize the technology applications and outcome.

- EE Times

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