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TSMC approves Centura for 65nm gate-stack building

Posted: 09 May 2005 ?? ?Print Version ?Bookmark and Share

Keywords:foundry chip? decoupled plasma nitridation?

Foundry chip maker Taiwan Semiconductor Mfg Co. Ltd (Hsinchu, Taiwan) has found the Centura gate-stack system suitable for use in all of its 65nm generation transistor fabrication processes, Centura's supplier, Applied Materials Inc. said.

The Centura system includes decoupled plasma nitridation (DPN) Applied said.

"The gate stack system with Applied's DPN technology has helped us scale our transistors and extend oxynitride gate dielectrics to the 65nm generation, for both high performance and low-power applications, with the productivity needed for volume production," said Mong-Song Liang, senior director within the Advanced Modules Technology Division of TSMC's R&D unit, said in a statement issued by Applied.

- Peter Clarke

EE Times





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