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FPGA-equipped VME data-acq board leverages VXS standard

Posted: 18 May 2005 ?? ?Print Version ?Bookmark and Share

Keywords:tek Microsystems? qinetiq? venus vxs-1? data-acq? xilinx?

Billed as the first 6U-sized VXS (conforming to the VITA-41 standard) board to combine five high-resolution A/D (analog-to-digital) input channels with fpga-based signal processing, the Quixilica Venus VXS-1 is for multi-channel high-end sensor data-acq and processing applications. Typical uses are in electronic warfare systems, signals intelligence systems, and radar, where the board can serve as a modular open-standard building block.

A word about VXS. It adds a switched serial interconnect to the venerable VMEbus, and it works with VMEbus's parallel bus architecture. VXS also supports standard open switched-fabric interconnect technologies, such as Infiniband, PCI Express, Serial RapidIO 4X, and 10GbE, letting them communicate across a VME backplane.

In VXS, an individual transaction can have up to fifty times the bandwidth that it would have on VME64's parallel bus. Also, aggregate bandwidth in a chassis can be as much as nine hundred times the aggregate bandwidth available on the VME64 parallel bus!

This bandwidth is delivered in a very low latency environment (an individual switch in VXS can pass traffic with latency as low as 150ns). VXS adds a high-speed connector to VME boards to support the switched fabric interconnects, with data rates up to 2.5GBps for each 6U payload slot.

A Xilinx virtex ii pro on-board
Offered by TEK Microsystems and QinetiQ, the Quixilica Venus VXS-1 is the newest member of a Quixilica family of 6U VME products. The board's combination of high channel-count and tightly-coupled FPGA resources is claimed to reduce total board count and cost for front-end signal processing functions.

A Xilinx Virtex II Pro V2P70 FPGA on the Venus board provides 33,000 logic slices, permitting a wide range of functions to be implemented within the single FPGA device. The V2P70 FPGA provides two embedded processors and sixteen Rocket IO serial multi-Gbit/s transceivers. The Rocket IO links are the principal mechanism used for high speed data IO and control on the card.

AD6645 chips
The five data converter channels are based on Analog Devices' 14bit 105MS/s AD6645 chips. These ICs are used in quite a few competing boards (see reference links at end of this story). Options provide for either transformer AC-coupled or buffered DC-coupled inputs.

A single external sampling clock is distributed to all five channels via a low-skew low-jitter passive clock distribution network. It ensures performance in multi-channel applications. A connection is also available for an external trigger input to the FPGA, giving you the ability to implement a range of trigger options in firmware.

Bandwidth and scalability
Significantly, the VXS architecture provides the bandwidth and scalability to build a range of systems based on this product, ranging from single-card systems to 80-channel array processors.

According to Dr. Bill Smith, manager of the Real Time Embedded Systems group at QinetiQ, the QinetiQ Venus card's five 105-MHz A/D converters, large FPGA, and VXS serial data links are especially suited to CESM (Communications Electronic Support Measures) applications. The diagram here shows a typical multi-standard configuration.

"Ever increasing amounts of the RF (radio frequency) spectrum are being used," says Smith, "requiring CESM systems to survey and present growing quantities of information. The Venus enables highly dense front-end processing to funnel data to arrays of more classical processors. It also reduces what MIL folks call SWAP (size, weight and power). Using Venus in one system reduced VME card-count by 80%, representing a significant cost and SWAP saving."

In the Venus, memory and inter-processor communications resources have been optimized to address the requirements of very high performance realtime digital signal processing. The use of a common FPGA architecture and software API (application programming interface) lets applications migrate between different Quixilica approaches, too, protecting your investment in both FPGA IP (intellectual property) and application software.

In addition to the board's five A/D channels and FPGA processing, the use of VXS lets Venus support applications that need access to both raw and processed data from all five A/D's, at the full sample rate. That lets you craft very high channel-count systems without sacrificing open standard interoperability.

A range of IP cores
As a part of the Quixilica family of products, the Venus is available with a range of IP cores. These are available either as pre-integrated cores, or as modular IP functions for integration with your application-specific IP. Available IP cores include FFTs (fast Fourier transforms), digital receivers, digital filters, and floating-point library functions, to name just a few.

For its part, TEK Microsystems will integrate Venus into its signal processing and data recording systems, and will make Venus boards available through distribution channels in the USA and Canada. TEK and QinetiQ will also offer development kits, FPGA cores, and software.

The Quixilica Venus VXS-1 is priced starting at about $18,900 in single unit quantities.

- Alex Mendelsohn
eeProductCenter




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