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DSP includes Serial RapidIO bus

Posted: 25 May 2005 ?? ?Print Version ?Bookmark and Share

Keywords:texas instruments? ti? dsp? serial rapidIo? tms320c6455?

Texas Instruments Inc. (TI) disclosed that its new DSP offers improved performance, reduced code size plus more on-chip memory and high bandwidth integrated peripherals, including the Serial RapidIO bus for inter-processor communications.

According to the press release, developers of telecommunications, network and video infrastructure end-equipments and high-end imaging systems will see a system performance gain when using the new TMS320C6455 DSP due to 2x -12x boosts in performance and I/O bandwidth, allowing them to integrate more high-bandwidth channels, achieve higher image definition, and produce more efficient software easily for faster time-to-market.

"As the telecom, imaging, networking and video industries continue to develop new services, the C6455 DSP's programming flexibility allows developers to keep pace with changes in standards and to quickly implement multiple voice and video codecs in their system designs," said Thomas Brooks, DSP platform marketing manager at TI.

Other features
New peripherals and features of the C6455 chip, as compared to previous 1GHz C64x DSPs, include Gigabit Ethernet MAC (Memory Access Controller) that offers 10 times more Ethernet bandwidth than previous C64x devices; DDR2 (Double Data Rate) external memory interface that delivers twice the throughput of currently available devices; 66MHz PCI (Peripheral Component Interconnect) bus interface that provides twice the frequency of previous processors; and 2MB of L2 Memory that gives OEMs twice the amount of memory as previous C64x devices.

TI added that the enhanced C64x+ DSP core on which the C6455 DSP is based adds new specialized instructions that on average, make code 20 to 30 percent more compact and 20 percent more cycle efficient than code based on its current advanced C64x DSP architecture. The new instructions include complex and 32bit wide multiplications and simultaneous add/subtract instructions, increasing Fast Fourier Transform (FFT) and Discrete Cosine Transform (DCT) performance. The core can execute eight 16x16 multiply and accumulate instructions per cycle, twice as many as the current C64x DSP core. Since the new C64x+ instruction set is a superset of the C64x instructions, software for the new device is 100 percent object code compatible with code for existing C64x DSPs.

Based on the company's advanced 90nm CMOS technology, the TMS320C6455 DSP will be offered in 1GHz, 850MHz and 720MHz versions. Volume production is scheduled for the second quarter of 2006. The device will be available in a 697-pin 24-by-24mm BGA package. Planned pricing is $259 per 1GHz unit, $219 per 850MHz unit, and $179 per 720MHz unit in quantities of 10,000 units.

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