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Mentor Catapult C supports Panasonic network equipment apps

Posted: 13 Jun 2005 ?? ?Print Version ?Bookmark and Share

Keywords:catapult c? synthesis tool? panasonic communications? asic?

Mentor Graphics Corp. announced that Panasonic Communications Co. Ltd has selected the Mentor Graphics Catapult C Synthesis tool after evaluating other high-level synthesis tools. Panasonic Communications chose the Catapult C Synthesis tool based on the product's maturity and the productivity improvements it offers by synthesizing pure ANSI C++ descriptions.

Akitoshi Matsuda, corporate information systems group, Panasonic Communications, said, "Using the tool, we are able to realize the benefits of algorithmic synthesis, which uses pure ANSI C++ system models as input. Algorithmic synthesis requires far less manual effort, allowing us to specify interfaces and hierarchy using constraints, and instantly target FPGA or ASIC implementations without changing the original pure C++ source."

Panasonic Communications designs ASICs used in their voice, data and video communication systems. The company typically implements its algorithmic designs in a field programmable gate array (FPGA) prototype for real-time performance and functional validation before retargeting the design to an ASIC for production. The manual effort required to create register-transfer level (RTL) descriptions for both FPGA prototypes and ASICs left no time for design exploration, leading the company to explore high-level synthesis.

Catapult C Synthesis tool automatically creates RTL from a pure ANSI C++ source where both the core algorithm and interface are untimed. The productivity improvement gives designers time to perform detailed "what-if" analysis on varying micro-architecture and interface scenarios to quickly achieve fully optimized hardware designs for either FPGA or ASIC implementations. The tool creates RTL that can be synthesized into gates using standard RTL synthesis products, enabling it to fit within a wide variety of tool flows.

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